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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 1 sed1330f/1335f/1336f lcd controller ics technical manual s-mos systems, inc. september, 1995 version 0.4
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 2 268-0.4 this page intentionally blank
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 3 table of contents sed1330f/1335f/1336f contents 1.0 overview ............................................................................................................. 9 1.1 description .................................................................................................................................. 11 1.2 features ...................................................................................................................................... 11 1.3 block diagram ............................................................................................................................. 12 1.4 pinouts ........................................................................................................................................ 14 1.4.1 sed1330fba, 1335fbb and SED1336F0a pinouts ............................................. 14 1.4.2 sed1330fba and sed1335f0a pinouts .............................................................. 14 1.5 package dimensions ................................................................................................................... 15 2.0 pin description ................................................................................................. 17 2.1 sed1330fba/bb pin summary .................................................................................................. 18 2.2 sed1330f/1335f0a/0b pin summary ....................................................................................... 19 2.3 SED1336F0a pin summary ........................................................................................................ 20 2.4 pin functions ............................................................................................................................... 21 2.4.1 power supply .......................................................................................................... 21 2.4.2 oscillator ................................................................................................................. 21 2.4.3 microprocessor interface ........................................................................................ 21 2.4.4 display memory control ......................................................................................... 23 2.4.5 lcd drive signals .................................................................................................. 23 3.0 command description ..................................................................................... 25 3.1 the command set ...................................................................................................................... 27 3.2 system control commands ........................................................................................................ 28 3.2.1 system set ......................................................................................................... 28 3.2.1.1 c ........................................................................................................ 29 3.2.1.2 m0 ...................................................................................................... 29 3.2.1.3 m1 ...................................................................................................... 29 3.2.1.4 m2 ...................................................................................................... 29 3.2.1.5 w/s .................................................................................................... 29 3.2.1.6 iv ........................................................................................................ 32 3.2.1.7 t/l ...................................................................................................... 32 3.2.1.8 dr ...................................................................................................... 32 3.2.1.9 fx ...................................................................................................... 32 3.2.1.10 wf ................................................................................................... 33 3.2.1.11 fy ..................................................................................................... 33 3.2.1.12 c/r .................................................................................................... 34 3.2.1.13 tc/r ................................................................................................. 34 3.2.1.14 l/f .................................................................................................... 35 3.2.1.15 ap .................................................................................................... 35 3.2.2 sleep in................................................................................................................ 36
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 4 268-0.4 sed1330f/1335f/1336f table of contents 3.3 display control commands ......................................................................................................... 36 3.3.1 disp on/off ......................................................................................................... 36 3.3.1.1 d ........................................................................................................ 37 3.3.1.2 fc ...................................................................................................... 37 3.3.1.3 fp ...................................................................................................... 37 3.3.2 scroll ................................................................................................................. 37 3.3.2.1 c ........................................................................................................ 37 3.3.2.2 sl1, sl2 ............................................................................................ 38 3.3.3 csrform.............................................................................................................. 42 3.3.3.1 crx ................................................................................................... 42 3.3.3.2 cry .................................................................................................... 42 3.3.3.3 cm ..................................................................................................... 43 3.3.4 csrdir .................................................................................................................. 43 3.3.5 ovlay .................................................................................................................... 43 3.3.5.1 mx0, mx1 .......................................................................................... 43 3.3.5.2 dm1, dm2 .......................................................................................... 45 3.3.5.3 ov ...................................................................................................... 45 3.3.6 cgram adr .......................................................................................................... 45 3.3.7 hdot scr ............................................................................................................. 45 3.3.7.1 d0 to d2 ............................................................................................. 45 3.4 drawing control commands ....................................................................................................... 46 3.4.1 csrw ..................................................................................................................... 46 3.4.2 csrr ...................................................................................................................... 46 3.5 memory control commands ....................................................................................................... 47 3.5.1 mwrite ................................................................................................................. 47 3.5.2 mread ................................................................................................................... 47 4.0 specifications ................................................................................................... 49 4.1 absolute maximum ratings ......................................................................................................... 51 4.1.1 sed1330 ................................................................................................................ 51 4.1.2 sed1335/sed1336 ................................................................................................ 51 4.2 sed 1330 electrical characteristics............................................................................................ 52 4.3 sed1335/1336 electrical characteristics.................................................................................... 53 4.4 sed1330 timing diagrams ......................................................................................................... 54 4.4.1 system bus read/write timing i (8080) ............................................................. 54 4.4.1.1 sed1330f ......................................................................................... 54 4.4.2 system bus read/write timing ii (6800) ............................................................ 55 4.4.2.1 sed1330f ......................................................................................... 55 4.4.3 display memory read timing ................................................................................ 56 4.4.3.1 sed1330f ......................................................................................... 56 4.4.4 display memory write timing ............................................................................... 57 4.4.4.1 sed1330f ......................................................................................... 57 4.4.5 lcd control timing .................................................................................................. 58 4.4.5.1 sed1330f ......................................................................................... 59
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 5 4.4.6 oscillator timing ...................................................................................................... 60 4.4.6.1 sed1330f ......................................................................................... 60 4.4.7 measurement circuit ............................................................................................... 61 4.5 sed1335/sed1336 ac timing diagrams ................................................................................... 62 4.5.1 8080 family interface timing ................................................................................... 62 4.5.1.1 sed1335f ......................................................................................... 62 4.5.1.2 SED1336F ......................................................................................... 63 4.5.2 6800 family interface timing ................................................................................... 64 4.5.2.1 sed1335f ......................................................................................... 65 4.5.2.2 SED1336F ......................................................................................... 65 4.5.3 display memory read timing ................................................................................. 66 4.5.3.1 sed1335f ......................................................................................... 66 4.5.3.2 SED1336F ......................................................................................... 67 4.5.4 display memory write timing ................................................................................. 68 4.5.4.1 sed1335f ......................................................................................... 69 4.5.4.2 SED1336F ......................................................................................... 70 4.5.5 sleep in command timing .................................................................................. 71 4.5.5.1 sed1335f ......................................................................................... 71 4.5.5.2 SED1336F ......................................................................................... 71 4.5.6 external oscillator signal timing ............................................................................ 72 4.5.6.1 sed1335f ......................................................................................... 72 4.5.6.2 SED1336F ......................................................................................... 72 4.5.7 e-1330 lcd controller ic ........................................................................................................ 73 4.5.7.1 sed1335f ......................................................................................... 75 4.5.7.2 SED1336F ......................................................................................... 75 5.0 display control functions .............................................................................. 77 5.1 character configuration .............................................................................................................. 79 5.2 screen configuration ................................................................................................................... 81 5.2.1 screen configuration .............................................................................................. 81 5.2.2 display address scanning ...................................................................................... 81 5.2.3 display scan timing ............................................................................................... 84 5.3 cursor control ............................................................................................................................. 85 5.3.1 cursor register function ........................................................................................ 85 5.3.2 cursor movement ................................................................................................... 85 5.3.3 cursor display layers ............................................................................................ 85 5.4 memory to display relationship .................................................................................................. 87 5.5 scrolling ....................................................................................................................................... 90 5.5.1 on-page scrolling ................................................................................................... 90 5.5.2 inter-page scrolling ................................................................................................. 91 5.5.3 horizontal scrolling ................................................................................................. 92 5.5.4 bidirectional scrolling ............................................................................................. 93 5.5.5 scroll units.............................................................................................................. 93 table of contents sed1330f/1335f/1336f
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 6 268-0.4 6.0 character generator ........................................................................................ 95 6.1 cg characteristics ...................................................................................................................... 97 6.1.1 internal character generator .................................................................................. 97 6.1.2 external character generator rom ....................................................................... 97 6.1.3 character generator ram ...................................................................................... 97 6.2 cg memory allocation................................................................................................................. 98 6.3 setting the character generator address ................................................................................... 99 6.3.1 m1 = 1 ................................................................................................................... 100 6.3.2 cg ram addressing example .............................................................................. 100 6.4 character codes ....................................................................................................................... 101 7.0 tv mode (SED1336F only) ............................................................................. 103 7.1 sync generator circuit timing .................................................................................................. 105 8.0 description of circuit blocks ........................................................................ 109 8.1 microprocessor interface ........................................................................................................... 111 8.1.1 system bus interface............................................................................................ 111 8.1.1.1 8080 series ...................................................................................... 111 8.1.1.2 6800 series ...................................................................................... 111 8.1.2 microprocessor synchronization........................................................................... 111 8.1.2.1 display status indication output for SED1336F only...................... 111 8.1.2.2 internal register access .................................................................. 111 8.1.2.3 display memory access ................................................................... 111 8.1.3 interface examples ............................................................................................... 113 8.1.3.1 z80? to sed1330f/1335f/1336f interface .................................... 113 8.1.3.2 6802 to sed1330f/1335f/1336f interface ..................................... 114 8.2 display memory interface .......................................................................................................... 115 8.2.1 static ram ............................................................................................................ 115 8.2.2 supply current during display memory access .................................................... 115 8.3 oscillator circuit ........................................................................................................................ 116 8.4 status flag ................................................................................................................................ 116 8.5 reset ......................................................................................................................................... 117 9.0 application notes ........................................................................................... 119 9.1 initialization parameters ............................................................................................................ 121 9.1.1 system set instruction and parameters ........................................................... 121 9.1.2 initialization example ............................................................................................ 122 9.1.3 display mode setting example 1: combining text and graphics ......................... 128 9.1.4 display mode setting example 2: combining graphics and graphics ................. 129 9.1.5 display mode setting example 3: combining three graphics layers ................. 130 9.2 system overview ...................................................................................................................... 132 sed1330f/1335f/1336f table of contents
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 7 table of contents sed1330f/1335f/1336f 9.3 system interconnection ............................................................................................................. 133 9.3.1 sed1330f/1335f ................................................................................................. 133 9.3.2 SED1336F ............................................................................................................ 134 9.4 smooth horizontal scrolling ...................................................................................................... 135 9.5 layered display attributes ......................................................................................................... 137 9.5.1 inverse display ..................................................................................................... 137 9.5.2 half-tone display .................................................................................................. 137 9.5.2.1 menu pad display ............................................................................ 137 9.5.2.2 graph display .................................................................................. 138 9.5.3 flashing areas ...................................................................................................... 138 9.5.3.1 small area ........................................................................................ 138 9.5.3.2 large area ....................................................................................... 138 9.6 16 16-dot graphic display ...................................................................................................... 139 9.6.1 command usage .................................................................................................. 139 9.6.2 kanji character display ........................................................................................ 139 10.0 internal character generator font ............................................................. 141 11.0 glossary of terms ........................................................................................ 145
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 8 268-0.4 sed1330f/1335f/1336f table of contents this page intentionally blank
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 9 1.0 overview
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 11 1.0 C 1.2 1.0 overview 1.0 overview 1.1 description the sed1330/1335f/1336f is a family of versatile lcd controller ics that can display text and graphics on a medium size lcd panel. the software is compatible among all three chips. s-mos recom- mends new designs use the sed1335 since the sed1330 will gradually be replaced by the sed1335. the SED1336F incorporates a tv sync generator circuit that is compatible with both ntsc and pal systems. the 256 200 pixel tv display comprises three superimposed layers, and is identical to the simultaneous lcd panel display. when driving an lcd only, up to 3 overlapping layers can be displayed on lcd panels up to 640 256 pixels in size. the sed1330/1335f does not incorporate a tv controller. the sed 1330/ 1335f/1336f can display layered text and graphics, scroll the display in any direction and partition the display into multiple screens. the sed 1330/ 1335f/1336f stores text, character codes and bit-mapped graphics data in external frame buffer memory. display controller functions include transferring data from the controlling microprocessor to the buffer memory, reading memory data, convert- ing data to display pixels and generating timing sig- nals for the buffer memory, tv monitor and lcd panel. the sed 1330/ 1335f/1336f has an internal charac- ter generator with 160, 5 7 pixel characters in internal mask rom. the character generators sup- port up to 64, 8 16 pixel characters in external character generator ram and up to 256, 8 16 pixel characters in external character generator rom. 1.2 features ? text, graphics and combined text/graphics dis- play modes ? three overlapping screens in graphics mode ? 640 256 pixel lcd panel display resolution ? programmable cursor control ? smooth horizontal and vertical scrolling of all or part of the display ? 1/2-duty to 1/256-duty lcd drive ? up to 64 kbytes of external static ram frame buffer memory ? internal character generator ? 160, 5 7 pixel characters in internal mask- programmed character generator rom ? up to 64, 8 16 pixel characters in external character generator ram ? up to 256, 8 16 pixel characters in external character generator rom ? 6800 and 8080 family microprocessor inter- faces ? ntsc and pal systems compatible (SED1336F only) ? 256 200 pixel tv monitor display resolution (SED1336F only) ? low power consumption3.5 ma operating current (v dd = 3.5v), 0.05 m a standby current ? 4.5 to 5.5v (sed1330f) ? 2.7 to 5.5v (sed1330f/1335f) ? 3.0 to 5.5v (SED1336F) ? available in 60-pin qfps
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 12 268-0.4 1.0 overview 1.3 1.3 block diagram figure 1. sed1330f block diagram video ram character generator ram character generator rom lcd lcd controller input/output register video ram interface display address controller cursor address controller refresh counter dot counter layered controller character generator rom oscillator microprocessor interface yscl,yd,ydis lp, wf xscl, xecl xd0 to xd3 vd0 to vd7 va0 to va15 vce vr/w sel1 sel0 res rd, wr a0, cs d0 to d7 osc1 osc2
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 13 1.3 block diagram figure 2. sed1335f/1336f block diagram 1.3 1.0 overview video ram character generator ram character generator rom lcd controller video ram interface display address controller cursor address controller refresh counter dot counter character generator rom layered controller oscillator microprocessor interface yscl, yd, ydis lp, wf xscl, xecl xd0 to xd3 vd0 to vd7 va0 to va15 vce, vrd, vwr vrd vwr sel1 sel0 res rd, wr a0, cs d0 to d7 xg xd tv controller* input/output register tv lcd vsd snc *SED1336F only
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 14 268-0.4 1.0 overview 1.4 C 1.4.2 1.4 pinouts index 115 31 45 46 60 sed1330f bb 16 30 xd3 d7 d6 d5 d4 d3 d2 d1 d0 v dd a0 cs osc2 osc1 sel 1 vd3 vd2 vd1 vd0 va15 va14 va13 va12 va11 va10 va9 va8 va7 va6 nc vd4 vd5 vd6 vd7 yscl yd ydis wf lp v ss xscl xecl xd0 xd1 xd2 va5 va4 va3 va2 va1 va0 vr/w vce nc res nc nc rd wr sel 2 index 55 1 30 60 5 29 40 45 50 20 15 10 sed1330f ba va8 va9 va10 va11 va12 va13 nc va14 va15 vd0 vd1 vd2 xd cs a0 v dd d0 d1 d2 d3 d4 d5 d6 d7 xd3 xd2 xd1 xd0 xecl xscl v ss lp wf ydis yd yscl vd7 vd6 vd5 vd4 vd3 xg sel1 sel2 wr rd nc nc res nc vce vwr va0 va1 va2 va3 va4 va5 va6 va7 6 figure 3. sed1330f and sed1335f pinouts index 115 31 45 46 60 sed1335f 0b (SED1336F 0a ) 16 30 xd3 d7 d6 d5 d4 d3 d2 d1 d0 v dd a0 cs xd xg sel1 vd3 vd2 vd1 vd0 va15 va14 va13 va12 va11 va10 va9 va8 va7 va6 nc vd4 vd5 vd6 vd7 yscl(snc) yd ydis wf lp v ss xscl xecl(vsd) xd0 xd1 xd2 va5 va4 va3 va2 va1 va0 vwr vce vrd res nc nc(clo) rd wr sel 2(nt/pl) index 55 1 30 60 5 29 40 45 50 20 15 10 sed1335f oa va8 va9 va10 va11 va12 va13 nc va14 va15 vd0 vd1 vd2 xd cs a0 v dd d0 d1 d2 d3 d4 d5 d6 d7 xd3 xd2 xd1 xd0 xecl xscl v ss lp wf ydis yd yscl vd7 vd6 vd5 vd4 vd3 xg sel1 sel2 wr rd nc nc res vrd vce vwr va0 va1 va2 va3 va4 va5 va6 va7 6
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 15 1.5 package dimensions qfp5 unit: mm figure 5. sed1330f bb , 1335f 0b and SED1336F 0a qfp6 unit: mm index 115 31 16 45 46 60 30 0 ~ 12 1.8 2.7 0.1 0.8 0.3 0.15 0.05 0.35 0.15 0.8 0.15 17.6 0.4 14.0 0.2 17.6 0.4 14.0 0.2 0 ~ 12 2.8 2.7 0.1 1.5 0.3 0.15 0.05 index 623 36 24 54 55 1 30 0.35 0.1 19.6 0.4 14.0 0.1 25.6 0.4 20.0 0.1 60 5 29 35 1.0 0.1 figure 4. sed1330f ba and 1335f 0a package dimensions 1.4 C 1.4.2 1.0 overview
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 16 268-0.4 this page intentionally blank
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 17 2.0 pin description
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 18 268-0.4 2.0 pin description 2.1 sed1330f ba/bb pin summary 2.0 pin description 2.0 C 2.1 name number type description sed1330f 0a sed1330f bb va0 to va15 27 to 28 50 to 59 output vram address bus 30 to 43 1 to 6 vr/w 44 7 output vram write signal vce 45 8 output memory control signal res 47 10 input reset nc 29, 46, 48, 49 9, 11, 12, 60 no connection rd 50 13 input 8080 family: read signal 6800 family: enable clock (e) wr 51 14 input 8080 family: write signal 6800 family: r/w signal sel2 52 15 input 8080 or 6800 family interface select sel1 53 16 input 8080 or 6800 family interface select osc1 54 17 input oscillator connection osc2 55 18 output oscillator connection cs 56 19 input chip select a0 57 20 input data type select v dd 58 21 supply 4.5 to 5.5v supply d0 to d7 59 to 60 22 to 29 input/output data bus 1 to 6 xd0 to xd3 10 to 7 33 to 30 output x-driver data xecl 11 34 output x-driver enable chain clock xscl 12 35 output x-driver data shift clock v ss 13 36 supply ground lp 14 37 output latch pulse wf 15 38 output frame signal ydis 16 39 output power-down signal when display is blanked yd 17 40 output scan start pulse yscl 18 41 output y-driver shift clock vd0 to vd7 26 to 19 49 to 42 input/output vram data bus
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 19 2.0 C 2.2 2.0 pin description 2.0 pin description 2.2 sed1330f/1335f 0a/0b pin summary name number type description sed1335f 0a sed1335f 0b va0 to va15 27 to 28 50 to 59 output vram address bus 30 to 43 1 to 6 vwr 44 7 output vram write signal vce 45 8 output memory control signal vrd 46 9 output vram read signal res 47 10 input reset nc 29, 48, 49 11, 12, 60 no connection rd 50 13 input 8080 family: read signal 6800 family: enable clock (e) wr 51 14 input 8080 family: write signal 6800 family: r/w signal sel2 52 15 input 8080 or 6800 family interface select sel1 53 16 input 8080 or 6800 family interface select xg 54 17 input oscillator connection xd 55 18 output oscillator connection cs 56 19 input chip select a0 57 20 input data type select v dd 58 21 supply 2.7 to 5.5v supply d0 to d7 59 to 60 22 to 29 input/output data bus 1 to 6 xd0 to xd3 10 to 7 33 to 30 output x-driver data xecl 11 34 output x-driver enable chain clock xscl 12 35 output x-driver data shift clock v ss 13 36 supply ground lp 14 37 output latch pulse wf 15 38 output frame signal ydis 16 39 output power-down signal when display is blanked yd 17 40 output scan start pulse yscl 18 41 output y-driver shift clock vd0 to vd7 26 to 19 49 to 42 input/output vram data bus
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 20 268-0.4 2.0 pin description 2.3 2.3 SED1336F 0a pin summary name number type description va0 to va15 1 to 6 output vram address bus 50 to 59 vwr 7 output vram write signal vce 8 output memory control signal vrd 9 output vram read signal res 10 input reset nc 11, 60 no connection clo 12 output clock output rd 13 input 8080 family: read signal 6800 family: enable clock (e) wr 14 input 8080 family: write signal 6800 family: r/w signal nt/pl 15 input ntsc or pal tv mode select sel1 16 input 8080 or 6800 family interface select osc1 17 input oscillator connection osc2 18 output oscillator connection cs 19 input chip select a0 20 input data type select v dd 21 supply 3.0 to 5.5v supply d0 to d7 22 to 29 input/output data bus xd0 to xd3 30 to 33 output x-driver data vsd 34 output video data xscl 35 output data shift clock v ss 36 supply ground lp 37 output latch pulse wf 38 output frame signal ydis 39 output power-down signal when display is blanked yd 40 output scan start pulse snc 41 output tv sync signal vd0 to vd7 42 to 49 input/output vram data bus
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 21 2.4 C 2.4.3 2.0 pin description 2.4 pin functions 2.4.1 power supply pin name function v dd 4.5 to 5.5v (sed1330f), 3.0 to 5.5v (SED1336F) or 2.7 to 5.5v (sed1330f/1335f) supply. this may be the same supply as the controlling microprocessor. v ss ground note: the peak supply current drawn by the sed1330f/1335f/1336f may be up to ten times the average supply current. the power supply impedance must be kept as low as possible by ensuring that supply lines are sufficiently wide and by placing 0.47 m f decoupling capacitors that have good high-frequency response near the devices supply pins. 2.4.3 microprocessor interface pin name function d0 to d7 tristate input/output pins. connect these pins to an 8- or 16-bit microprocessor bus. microprocessor interface select pin. the SED1336F supports both 8080 family processors (such as the 8085 and z80?) and 6800 family processors (such as the 6802 and 6809). sel1* sel2 interface a0 rd wr cs 0 0 8080 family a0 rd wr cs 1 0 6800 family a0 e r/w cs * sed1330f and sed1335f only note: sel1 should be tied directly to v dd or v ss to prevent noise. if noise does appear on sel1, decouple it to ground using a capacitor placed as close to the pin as possible. sel1, sel2 2.4.2 oscillator pin name function (osc) xg crystal connection for internal oscillator (see section 8.3). this pin can be driven by an external clock source that satisfies the timing specifications of the ext f 0 signal (see section 4.3.6). (osc2) xd crystal connection for internal oscillator. leave this pin open when using an external clock source. clo clock output (SED1336F only). same phase as xg. clock is output when system command p1 is executed. output stops during system reset.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 22 268-0.4 2.0 pin description 2.4.3 pin name function a0, in conjunction with the rd and wr or r/w and e signals, controls the type of access to the SED1336F, as shown below. 8080 family interface a0 rd wr function 0 0 1 status flag read 1 0 1 display data and cursor address read 0 1 0 display data and parameter write 1 1 0 command write 6800 family interface a0 r/w e function 0 1 1 status flag read 1 1 1 display data and cursor address read 0 0 1 display data and parameter write 1 0 1 command write when the 8080 family interface is selected, this signal acts as the active-low read strobe. the sed1330f/1335f/1336fs output buffers are enabled when this signal is active. when the 6800 family interface is selected, this signal acts as the active-high enable clock. data is read from or written to the sed1330f/1335f/1336f when this clock goes high. when the 8080 family interface is selected, this signal acts as the active-low write strobe. the bus data is latched on the rising edge of this signal. when the 6800 family interface is selected, this signal acts as the read/write control signal. data is read from the sed1330f/1335f/1336f if this signal is high, and written to the sed1330f/ 1335f/1336f if it is low. chip select. this active-low input enables the sed1330f/1335f/1336f. it is usually connected to the output of an address decoder device that maps the sed1330f/1335f/1336f into the memory space of the controlling microprocessor. this active-low input performs a hardware reset on the sed1330f/1335f/1336f. it is a schmitt-trigger input for enhanced noise immunity; however, care should be taken to ensure that it is not triggered if the supply voltage is lowered. wr or r/w cs res rd or e a0
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 23 2.4.4 C 2.4.5 2.0 pin description 2.4.4 display memory control the sed1330f/1335f/1336f can directly access static ram and prom. the designer may use a mixture of these two types of memory to achieve an optimum trade-off between low cost and low power consumption. pin name function va0 to va15 16-bit display memory address. when accessing character generator ram or rom, va0 to va3, reflect the lower 4 bits of the row counter. vd0 to vd7 8-bit tristate display memory data bus. these pins are enabled when vr/w is low. vr/w active-low display memory write control output (sed1330). vrd active-low display memory read control output (sed1335/6). vce active-low static memory standby control signal. vce can be used with cs. vwr active-low display memory write control output (sed1335/6). 2.4.5 lcd drive signals in order to provide effective low-power drive for lcd matrixes, the sed1330f/1335f/1336f can directly control both the x- and y-drivers using an enable chain. pin name function xd0 to xd3 4-bit x-driver (column drive) data outputs. connect these outputs to the inputs of the x-driver chips. the falling edge of xscl latches the data on xd0 to xd3 into the input shift registers of the x-drivers. to conserve power, this clock halts between lp and the start of the following display line (see section 4.3.7). xecl the falling edge of xecl (sed1330f/1335f only) triggers the enable chain cascade for the x-drivers (sed1600/sed1180). every 16th clock pulse is output to the next x-driver. lp latches the signal in the x-driver shift registers into the output data latches. lp is a falling- edge triggered signal, and pulses once every display line. connect lp to the y-driver shift clock on modules that use the sed1600 and sed1610 drivers. wf lcd panel ac drive output. the wf period is selected to be one of two values with system set command. the falling edge of yscl (sed1330f/1335f only) latches the data on yd into the input shift registers of the y-drivers. yscl is not used with the sed1600, sed1610 or other driver ics which use lp as the y-driver shift clock. yd is the data pulse output for the y drivers. it is active during the last line of each frame, and is shifted through the y drivers one by one (by yscl), to scan the displays common connections. power-down output signal. ydis is high while the display drive outputs are active. ydis goes low one or two frames after the sleep command is written to the sed1330f/ 1335f/1336f. all y-driver outputs are forced to an intermediate level (de-selecting the display segments) to blank the display. in order to implement power-down operation in the lcd unit, the lcd power drive supplies must also be disabled when the display is disabled by ydis. xscl lp yscl yd ydis
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 25 1.3 C 1.4 1.0 overview 3.0 command description
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 27 3.0 C 3.1 3.0 command description 3.0 command description 3.1 the command set table 1. the command set command code read class command hex command description parameters rd wr a0 d7 d6 d5 d4 d3 d2 d1 d0 no. of sec- bytes tion system set 1010100000040 initialize device and dis- 8 3.2.1 play sleep in 1010101001153 enter standby mode 0 3.2.2 disp on/off 1010101100d 58, enable and disable dis- 1 3.3.1 59 play and display flashing scroll 1010100010044 set display start address 10 3.3.2 and display regions csrform 101010111015d set cursor type 2 3.3.3 cgram adr 101010111005c set start address of char- 2 3.3.6 acter generator ram cd cd 4c set direction of cursor csrdir 101010011 10 to movement 0 3.3.4 4f hdot scr 101010110105a set horizontal scroll pos- 1 3.3.7 ition ovlay 101010110115b set display overlay for- 1 3.3.5 mat csrw 1010100011046 set cursor address 2 3.4.1 csrr 1010100011147 read cursor address 2 3.4.2 mwrite 1010100001042 write to display memory 3.5.1 mread 1010100001143 read from display mem- 3.5.2 ory notes: 1. in general, the internal registers of the sed1330f/1335f/1336f are modified as each command parameter is input. however, the microprocessor does not have to set all the parameters of a command and may send a new command before all parameters have been input. the internal registers for the parameters that have been input will have been changed but the remaining parameter registers are unchanged. 2-byte parameters (where two bytes are treated as one data item) are handled as follows: a. csrw, csrr: each byte is processed individually. the microprocessor may read or write just the low byte of the cursor address. b. system set, scroll, cgram adr: both parameter bytes are processed together. if the command is changed after half of the parameter has been input, the single byte is ignored. 2. apl and aph are 2-byte parameters, but are treated as two 1-byte parameters. system control display control drawing control memory control
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 28 268-0.4 3.0 command description 3.2 C 3.2.1 3.2 system control commands 3.2.1 system set initializes the device, sets the window sizes, and selects the lcd interface format. since the command sets the basic operating parameters of the sed1330f/ 1335f/1336f, an incorrect system set command may cause other commands to operate incorrectly. c 01000000 1 0 1 d7 d6 d5 d4 d3 d2 d1 d0 a0 wr rd p1 dr t/l iv 1 w/s m2 m1 m0 0 0 1 p2 wf0000 fx 0 0 1 p3 0000 fy 0 0 1 p4 c/r 0 0 1 p5 tc/r 0 0 1 p6 l/f 0 0 1 p7 apl 0 0 1 p8 aph 0 0 1 lsb msb figure 7. system set instruction
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 29 3.2.1.1 C 3.2.1.5 3.0 command description 3.2.1.1 c this control byte performs the following: 1. resets the internal timing generator 2. disables the display 3. cancels sleep mode parameters following p1 are not needed if only can- celing sleep mode. 3.2.1.2 m0 selects the internal or external character generator rom. the internal character generator rom con- tains 160, 5 7 pixel characters. these characters are fixed at fabrication by the metalization mask. the external character generator rom can contain up to 256 user-defined characters. m0 = 0: internal cg rom m0 = 1: external cg rom note that if the cg rom address space overlaps the display memory address space, that portion of the display memory cannot be written to. 3.2.1.3 m1 selects the cg ram area for user-definable charac- ters. the cg ram codes are selected from the 64 codes shown in figure 59. m1 = 0: cg ram1; 32 char the cg ram1 and cg ram2 address spaces are not contiguous, the cg ram1 address space is treated as character generator ram, and the cg ram2 address space is treated as character generator rom. m1 = 1: 64 char cg ram + cg ram2 the cg ram1 and cg ram2 address spaces are contiguous and are both treated as character genera- tor ram. 3.2.1.4 m2 selects the height of the character defined in external cg rom and cg ram. characters more than 16 pix- els high can be displayed by creating a bitmap for each portion of each character and using the sed1330f/1335f/1336fs graphics mode to reposi- tion them. m2 = 0: 8-pixel character height (2716 or equivalent rom) m2 = 1: 16-pixel character height (2732 or equivalent rom) 3.2.1.5 w/s selects the lcd drive method. w/s = 0: single-panel drive w/s = 1: dual-panel drive
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 30 268-0.4 3.0 command description 3.2.1.5 figure 8. single-panel display figure 9. dual-panel display ei x driver x driver lcd y driver yd ei x driver x driver yd x driver x driver upper panel lower panel y driver
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 31 3.2.1.5 3.0 command description ei yd y driver x driver x driver x driver x driver right panel left panel note: there are no seiko-epson lcd units in the configuration shown in figure 10. figure 10. left-and-right two-panel display table 3. lcd parameters parameter w/s = 0 w/s = 1 iv = 1 iv = 0 iv = 1 iv = 0 c/r c/r c/r c/r c/r tc/r tc/r tc/r (see note 1) tc/r tc/r l/f l/f l/f l/f l/f sl1 00h to l/f 00h to l/f + 1 (l/f) / 2 (l/f) / 2 (see note 2) sl2 00h to l/f 00h to l/f + 1 (l/f) / 2 (l/f) / 2 (see note 2) sad1 first screen block first screen block first screen block first screen block sad2 second screen block second screen block second screen block second screen block sad3 third screen block third screen block third screen block third screen block sad4 invalid invalid fourth screen block fourth screen block cursor move- continuous movement over whole screen above-and-below configuration: ment range continuousmovement over whole screen notes: 1. see table 31 (page 105) for further details on setting the c/r and tc/r parameters when using the hdot scr command. 2. the value of sl when iv = 0 is equal to the value of sl when iv = 1, plus one.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 32 268-0.4 3.0 command description 3.2.1.6 C 3.2.1.9 3.2.1.6 iv screen origin compensation for inverse display. iv is usually set to 1. the best way of displaying inverted characters is to exclusive-or the text layer with the graphics back- ground layer. however, inverted characters at the top or left of the screen are difficult to read as the charac- ter origin is at the top-left of its bitmap and there are no background pixels either above or to the left of these characters. the iv flag causes the sed1330f/1335f/1336f to offset the text screen against the graphics back layer by one vertical pixel. use the horizontal pixel scroll function (hdot scr) to shift the text screen 1 to 7 pixels to the right. all characters will then have the necessary surrounding background pixels that en- sure easy reading of the inverted characters. see section 5.5 for information on scrolling. iv = 0: screen top-line correction iv = 1: no screen top-line correction (no offset) 3.2.1.7 t/l selects tv or lcd mode. when tv mode is selected, the tv sync generator circuit is on. t/l = 0: lcd mode t/l = 1: tv mode 3.2.1.9 fx sets the width, in pixels, of the character field. the character width in pixels is equal to fx + 1, where fx can range from 00 to 07h inclusive. if data bit 3 is set (fx is in the range 08 to 0fh) and an 8-pixel font is used, a space is inserted between characters. note that the maximum character width in tv mode is eight pixels. table 4. horizontal character size selection fx [fx] character width hex d3 d2 d1 d0 (pixels) 00 0000 1 01 0001 2 07 0111 8 since the sed1330f/1335f/1336f handles display data in 8-bit units, characters larger than 8 pixels wide must be formed from 8-pixel segments. as figure 12 shows, the remainder of the second eight bits are not displayed. this also applies to the second screen layer. in graphics mode, the normal character field is also eight pixels. if a wider character field is used, any remainder in the second eight bits is not displayed. 3.2.1.8 dr selects output of an additional shift-clock cycle for every 64 pixels. the extra cycles are required for correct operation of the enable chain when using a two-panel display. dr = 0: normal operation dr = 1: additional shift-clock cycles iv 1 dot dots 1 to 7 display start point back layer hdot scr character figure 11. iv and hdot scr adjustment
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 33 3.2.1.10 C 3.2.1.11 3.0 command description 8 bits fy fx 8 bits fy fx non-display area address b address a 8 bits 8 bits figure 12. fx and fy display addresses 3.2.1.10 wf selects the ac frame drive waveform period. wf is usually set to 1. wf = 0: 16-line ac drive wf = 1: two-frame ac drive in two-frame ac drive, the wf period is twice the frame period. in 16-line ac drive, wf inverts every 16 lines. although 16-line ac drive gives a more readable display, horizontal lines may appear when using high lcd drive voltages or at high viewing angles. 3.2.1.11 fy sets the height, in pixels, of the character. the height in pixels is equal to fy + 1. fy can range from 00 to 0fh inclusive. set fy to zero (vertical size equals one) when in graphics mode. table 5. vertical character size selection fy [fy] character hex d3 d2 d1 d0 height (pixels) 00 0000 1 01 0001 2 07 0111 8 0e 1110 15 0f 1111 16
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 34 268-0.4 3.0 command description 3.2.1.12 C 3.2.1.13 3.2.1.12 c/r sets the address range covered by one display line, that is, the number of characters less one, multiplied by the number of horizontal bytes per character. c/r can range from 0 to 239. for example, if the character width is 10 pixels, then the address range is equal to twice the number of characters, less 2. see section 9.1.1 for the calcula- tion of c/r. [c/r] cannot be set to a value greater than the address range. it can, however, be set smaller than the address range, in which case the excess display area is blank. the number of excess pixels must not exceed 64. table 6. display line address range c/r [c/r] bytes per display line hex d7 d6 d5 d4 d3 d2 d1 d0 00 00000000 1 01 00000001 2 4f 01001111 80 ee 11101110 239 ef 11101111 240 3.2.1.13 tc/r sets the length, including horizontal blanking, of one line. the line length is equal to tc/r + 1, where tc/ r can range from 0 to 255. tc/r must be greater than or equal to c/r + 4. provided this condition is satisfied, [tc/r] can be set according to the equation given in section 9.1.1 in order to hold the frame period constant and minimize jitter for any given main oscillator frequency, f osc . table 7. line length selection tc/r [tc/r] line length (bytes) hex d7 d6 d5 d4 d3 d2 d1 d0 00 00000000 1 01 00000001 2 52 01010010 83 fe 11111110 255 ff 11111111 256
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 35 3.2.1.14 C 3.2.1.15 3.0 command description 3.2.1.14 l/f sets the height, in lines, of a frame. the height in lines is equal to l/f + 1, where l/f can range from 0 to 255. if w/s is set to 1, selecting two-screen display, the number of lines must be even and l/f must, therefore, be an odd number. table 8. frame height selection l/f [l/f] lines per frame hex d7 d6 d5 d4 d3 d2 d1 d0 00 00000000 1 01 00000001 2 7f 01111111 128 fe 11111110 255 ff 11111111 256 table 9. frame heights and compatible lcd units number of lines [lf] panel duty cycle 64 1/64 128 1/64 table 10. horizontal address range hex code [ap] addresses aph apl per line 0000 0 0001 1 0050 80 fffe 2 16 C 2 ffff 2 16 C 1 3.2.1.15 ap defines the horizontal address range of the virtual screen. apl is the least significant byte of the ad- dress. figure 13. ap parameters apl ap7 ap6 ap5 ap4 ap3 ap2 ap1 ap0 aph ap15 ap14 ap13 ap12 ap11 ap10 ap9 ap8
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 36 268-0.4 3.0 command description 3.2.1.15 C 3.3.1 figure 14. ap and c/r relationship 3.2.2 sleep in places the system in standby mode. this command has no parameter bytes. at least one blank frame after receiving this command, the sed1330f/1335f/1336f halts all internal operations, including the oscillator, and enters the sleep mode. blank data is sent to the x-drivers, and the y-drivers have their bias supplies turned off by the ydis signal. using the ydis signal to disable the y-drivers guards against any spurious displays. the internal registers of the sed1330f/1335/1336f maintain their values during the sleep mode. the display memory control pins maintain their logic levels to ensure that the display memory is not corrupted. the sed1330f/1335f/1336f can be removed from the sleep state by sending the system set com- mand with only the p1 parameter. the disp on command should be sent next to enable the display. figure 15. sleep in instruction 1. the ydis signal goes low between one and two frames after the sleep in com- mand is received. since ydis forces all display driver outputs to go to the dese- lected output voltage, ydis can be used as a power-down signal for the lcd unit. this can be done by having ydis turn off the relatively high-power lcd drive supplies at the same time as it blanks the display. 2. since all internal clocks in the sed1330f/ 1335f/1336f are halted while in the sleep state, a dc voltage will be applied to the lcd panel if the lcd drive supplies remain on. if reliability is a prime consideration, turn off the lcd drive supplies before issuing the sleep in command. 3. note that, although the bus lines become high impedance in the sleep state, pull-up or pull-down resistors on the bus line will force these lines to a known state. 3.3 display control commands 3.3.1 disp on/off turns the whole display on or off. the single-byte parameter enables and disables the cursor and lay- ered screens, and sets the cursor and screen flash rates. the cursor can be set to flash over one charac- ter or over a whole line. msb lsb c01010011 figure 16. disp on/off parameters msb lsb c01011000 p1 fp5 fp4 fp3 fp2 fp1 fp0 fc1 fc0 display area c/r display memory limit ap
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 37 3.3.1.1 C 3.3.2.1 3.0 command description 3.3.1.1 d turns the display on or off. the d bit takes prece- dence over the fp bits in the parameter. d = 0: display off d = 1: display on 3.3.1.2 fc enables/disables the cursor and sets the flash rate. the cursor flashes with a 70% duty cycle (on/off). table 11. cursor flash rate selection fc1 fc0 cursor display 0 0 off (blank) 0 1 no flashing 10 flash at f fr /32 hz (approx. 2 hz) 11 flash at f fr /64 hz (approx. 1 hz) note: as the mwrite command always enables the cursor, the cursor position can be checked even when perform- ing consecutive writes to display memory while the cursor is flashing. 3.3.1.3 fp each pair of bits in fp sets the attributes of one screen block, as follows. table 12. screen block attribute selection fp1 fp0 first screen block (sad1) fp3 fp2 second screen block (sad2, sad4). see note. fp5 fp4 third screen block (sad3) 0 0 off (blank) 0 1 no flashing 10 flash at f fr /32 hz (approx. 2 hz) 11 flash at f fr /4 hz (approx. 16 hz) note: if sad4 is enabled by setting w/s to 1, fp3 and fp2 control both sad2 and sad4. the attributes of sad2 and sad4 cannot be set independently. 3.3.2 scroll 3.3.2.1 c sets the scroll start address and the number of lines per scroll block. parameters p1 to p10 can be omitted if not required. the parameters must be entered sequentially as shown in figure 17. on on msb lsb c01000100 p1 a7 a6 a5 a4 a3 a2 a1 a0 (sad 1l) p2 a15 a14 a13 a12 a11 a10 a9 a8 (sad 1h) p3 l7 l6 l5 l4 l3 l2 l1 l0 (sl 1) p4 a7 a6 a5 a4 a3 a2 a1 a0 (sad 2 l) p5 a15 a14 a13 a12 a11 a10 a9 a8 (sad 2h) p6 l7 l6 l5 l4 l3 l2 l1 l0 (sl 2) p7 a7 a6 a5 a4 a3 a2 a1 a0 (sad 3l) p8 a15 a14 a13 a12 a11 a10 a9 a8 (sad 3h) p9 a7 a6 a5 a4 a3 a2 a1 a0 (sad 4l) p10 a15 a14 a13 a12 a11 a10 a9 a8 (sad 4h) note: set parameters p9 and p10 only if both two-screen drive (w/s = 1) and two-layer configuration are se- lected. sad4 is the fourth screen block display start address. figure 17. scroll instruction parameters
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 38 268-0.4 3.0 command description 3.3.2.1 C 3.3.2.2 table 13. screen block start address selection sl1, sl2 [sl] screen lines hex l7 l6 l5 l4 l3 l2 l1 l0 00 00000000 1 01 00000001 2 7f 01111111 128 fe 11111110 255 ff 11111111 256 3.3.2.2 sl1, sl2 sl1 and sl2 set the number of lines per scrolling screen. the number of lines is sl1 or sl2 plus one. the relationship between sad, sl and the display mode is described below. table 14. text display mode w/s screen first layer second layer first screen block sad1 sad2 second screen block sl1 sl2 sad3 (see note 1) third screen block (partitioned screen) set both sl1 and sl2 to l/f + 1 if not using a partitioned screen. screen configuration example: 0 (continued) character display page 1 character display page 3 sad2 sad1 sad3 sl1 sl2 graphics display page 2 layer 2 la y er 1
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 39 3.3.2.2 3.0 command description table 14. text display mode (continued) w/s screen first layer second layer upper screen sad1 sad2 sl1 sl2 lower screen sad3 sad4 (see note 2) (see note 2) set both sl1 and sl2 to ((l/f) / 2 + 1) screen configuration example: 1 notes: 1. sad3 has the same value as either sad1 or sad2, whichever has the least number of lines (set by sl1 and sl2). 2. since the parameters corresponding to sl3 and sl4 are fixed by l/f, they do not have to be set in this mode. character display page 1 character display page 3 sad2 sad1 sad3 sl1 graphics display page 2 la y er 2 la y er 1 graphics display page 4 (sad4)
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 40 268-0.4 3.0 command description 3.3.2.2 table 15. graphics display mode w/s screen first layer second layer third layer two-layer composition sad1 sad2 sl1 sl2 sad3 (see note 3) upper screen set both sl1 and sl2 to l/f + 1 if not using a partitioned screen screen configuration example: 0 0 three-layer configuration sad1 sad2 sad3 sl1 = l/f + 1 sl2 = l/f + 1 screen configuration example: character display page 1 character display page 3 sad2 sad1 sad3 sl1 sl2 graphics display page 2 layer 1 layer 2 graphics display page 1 sad2 sad1 sad3 sl1 sl2 graphics display page 2 layer 1 graphics display page 3 layer 2 layer 3
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 41 3.3.2.2 3.0 command description notes: 1. sad3 has the same value as either sad1 or sad2, whichever has the least number of lines (set by sl1 and sl2). 2. since the parameters corresponding to sl3 and sl4 are fixed by l/f, they do not have to be set. 3. if, and only if, w/s = 1, the differences between sl1 and (l/f + 1) / 2, and between sl2 and (l/f + 1) / 2, are blanked. table 15. graphics display mode (continued) w/s screen first layer second layer third layer upper screen sad1 sad2 sl1 sl2 lower screen sad3 sad4 (see note 2) (see note 2) set both sl1 and sl2 to ((l/f) / 2 + 1) screen configuration example (see note 3): 1 figure 18. two-panel display height graphics display page 1 graphics display page 3 sad2 sad1 sad3 sl1 graphics display page 2 layer 2 layer 1 graphics display page 4 upper panel lower panel sl1 l/2 l graphics
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 42 268-0.4 msb lsb c01011101 p10000 x3 x2 crx x1 x0 p2 cm 0 0 0 y3 y2 cry y1 y0 3.0 command description 3.3.3 C 3.3.3.2 3.3.3 csrform sets the cursor size and display mode. although the cursor is normally only used in text displays, it may also be used in graphics displays when displaying special characters. 3.3.3.2 cry sets the location of an underscored cursor in lines, from the character origin. when using a block cursor, cry sets the vertical size of the cursor from the character origin. cry is equal to the number of lines less one. table 17. cursor height selection cry [cry] cursor hex y3 y2 y1 y0 height (lines) 0 0000 illegal 1 0001 2 8 1000 9 e 1110 15 f 1111 16 figure 20. cursor size and position figure 19. csrform parameter bytes 3.3.3.1 crx sets the horizontal size of the cursor from the charac- ter origin. crx is equal to the cursor size less one. crx must be less than or equal to fx. table 16. horizontal cursor size selection crx [crx] cursor width hex x3 x2 x1 x0 (pixels) 0 0000 1 1 0001 2 8 1000 9 e 1110 15 f 1111 16 0123456 0 1 2 3 4 5 6 7 8 9 character start point crx = 5 dots cry = 9 dots cm = 0
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 43 3.3.3.3 C 3.3.5.1 3.0 command description 3.3.3.3 cm sets the cursor display mode. always set cm to 1 when in graphics mode. cm = 0: underline cursor cm = 1: block cursor 3.3.4 csrdir sets the direction of automatic cursor increment. the cursor can move left or right one character, or up or down by the number of bytes specified by the address pitch, ap. when reading from and writing to display memory, this automatic cursor increment controls the display memory address increment on each read or write. table 18. cursor shift direction c cd1 cd0 shift direction 4ch 0 0 right 4dh 0 1 left 4eh 1 0 up 4fh 1 1 down note: since the cursor moves in address units even if fx 3 9, the cursor address increment must be preset for move- ment in character units. see section 5.3. 3.3.5 ovlay selects layered screen composition and screen text/ graphics mode. msb lsb c010011cd1cd2 figure 21. csrdir parameters figure 22. cursor direction msb lsb c01011011 p1 0 0 0 ov dm2 dm1 mx1 mx0 figure 23. ovlay parameter 3.3.5.1 mx0, mx1 mx0 and mx1 set the layered screen composition method, which can be either or, and, exclusive-or or priority-or. since the screen composition is orga- nized in layers and not by screen blocks, when using a layer divided into two screen blocks, different com- position methods cannot be specified for the indi- vidual screen blocks. the priority-or mode is the same as the or mode unless flashing of individual screens is used. 10 11 00 01 ? +1 +ap ?p
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 44 268-0.4 3.0 command description 3.3.5.1 table 19. composition method selection mx1 mx0 function composition method applications 0 0 l1 l2 l3 or underlining, rules, mixed text and graphics 0 1 (l1 ? l2) l3 exclusive-or inverted characters, flashing regions, un- derlining 1 0 (l1 ? l2) l3 and simple animation, three-dimensional ap- 1 1 l1 > l2 > l3 priority-or pearance notes: l1: first layer (text or graphics). if text is selected, layer l3 cannot be used. l2: second layer (graphics only) l3: third layer (graphics only) notes: l1: not flashing l2: flashing at 1 hz l3: flashing at 2 hz figure 24. combined layer display epson layer 1 layer 2 layer 3 epson visible display 1or epson epson 2 exclusive or epson 3 and epson 4 prioritized or epson son
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 45 3.3.5.2 C 3.3.7.1 3.0 command description 3.3.5.2 dm1, dm2 dm1 and dm2 specify the display mode of screen blocks 1 and 3, respectively. dm1/2 = 0: text mode dm1/2 = 1: graphics mode note 1: screen blocks 2 and 4 can only display graphics. note 2: dm1 and dm2 must be the same, regardless of the setting of w/s. 3.3.5.3 ov specifies two- or three-layer composition in graphics mode. ov = 0: two-layer composition ov = 1: three-layer composition set ov to 0 for mixed text and graphics mode. 3.3.6 cgram adr specifies the cg ram start address. msb lsb c01011100 p1 a7 a6 a5 a4 a3 a2 a1 a0 (sagl) p2 a15 a14 a13 a12 a11 a10 a9 a8 (sagh) figure 25. cgram adr parameters note: see section 6 for information on the sag parameters. 3.3.7 hdot scr while the scroll command only allows scrolling by characters, hdot scr allows the screen to be scrolled horizontally by pixels. hdot scr cannot be used on individual layers. msb lsb c01011010 p1 0 0 0 0 0 d2 d1 d0 3.3.7.1 d0 to d2 specifies the number of pixels to scroll. the c/r parameter has to be set to one more than the number of horizontal characters before using hdot scr. smooth scrolling can be simulated if the controlling microprocessor repeatedly issues the hdot scr command to the sed1330f/1335f/1336f. see sec- tion 5.5 for more information on scrolling the display. table 20. scroll step selection p1 number of pixels hex d2 d1 d0 to scroll 00 000 0 01 001 1 02 010 2 06 110 6 07 111 7 figure 26. hdot scr parameters
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 46 268-0.4 3.0 command description 3.4 C 3.4.2 3.4 drawing control commands 3.4.1 csrw the 16-bit cursor address register contains the dis- play memory of the data at the cursor position as shown in figure 28. figure 28. csrw parameters note that the microprocessor cannot directly access the display memory. the mread and mwrite commands use the ad- dress in this register. the cursor address register can only be modified by the csrw command, and by the automatic incre- ment after an mread or mwrite command. it is not affected by display scrolling. if a new address is not set, display memory accesses will be from the last set address or the address after previous automatic increments. 3.4.2 csrr reads from the cursor address register. after issuing the command, the data read address is read twice, for the low byte and then the high byte of the register. msb lsb c01000110 p1 a7 a6 a5 a4 a3 a2 a1 a0 (csrl) p2 a15 a14 a13 a12 a11 a10 a9 a8 (csrh) figure 29. csrr parameters msb lsb c01000111 p1 a7 a6 a5 a4 a3 a2 a1 a0 (csrl) p2 a15 a14 a13 a12 a11 a10 a9 a8 (csrh) m a bxy ab xy z ab xy z m = 0 n = 0 display width n m/n is the number of bits (dots) that parameter 1 (p1) is incremented/decremented by. figure 27. horizontal scrolling
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 47 3.5 C 3.5.2 3.0 command description 3.5 memory control commands 3.5.1 mwrite the microprocessor may write a sequence of data bytes to display memory by issuing the mread command and then writing the bytes to the sed1330f/ 1335f/1336f. there is no need for further mwrite commands or for the microprocessor to update the cursor address register after each byte as the cursor address is automatically incremented by the amount set with csrdir, in preparation for the next data write. figure 30. mwrite parameters 3.5.2 mread puts the sed1330f/1335f/1336f into the data out- put state. on the mread command, the display memory data at the cursor address is read into a buffer in the sed1330f/1335f/1336f. each time the microprocessor reads the buffer, the cursor address is incremented by the amount set by csrdir and the next data byte fetched from memory, so a sequence of data bytes may be read without further mread commands or by updating the cursor address register. if the cursor is displayed, the read data will be from two positions ahead of the cursor. figure 31. mread parameters msb lsb c01000010 p1 p2 pn n 3 1 note: p1, p2, ..., pn: display data. msb lsb c01000011 p1 p2 pn n 3 1
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 48 268-0.4 1.0 overview 1.3 this page intentionally blank
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 49 3.3.2.2 3.0 command description 4.0 specifications
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 50 268-0.4 this page intentionally blank
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 51 4.0 C 4.1 4.0 specifications 4.0 specifications 4.1 absolute maximum ratings 4.1.1 sed1330 parameter symbol rating unit supply voltage range v dd C0.3 to 7.0 v input voltage range v in C0.5 to v dd + 0.5 v power dissipation p d 300 mw operating temperature range t opr C20 to 75 c storage temperature range t stg C65 to 150 c soldering temperature (10 seconds). see note 1. t solder 260 c 4.1.2 sed1335/sed1336 parameter symbol rating unit supply voltage range v dd C0.3 to 7.0 v input voltage range v in C0.3 to v dd + 0.3 v power dissipation p d 300 mw operating temperature range t opr C20 to 75 c storage temperature range t stg C65 to 150 c soldering temperature (10 seconds). see note 1. t solder 260 c notes: 1. the humidity resistance of the flat package may be reduced if the package is immersed in solder. use a soldering technique that does not heatstress the package. 2. if the power supply has a high impedance, a large voltage differential can occur between the input and supply voltages. take appropriate care with the power supply and the layout of the supply lines. (see section 2.3.) 3. all supply voltages are referenced to v ss = 0v.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 52 268-0.4 4.0 specifications 4.2 v dd = 5v 10%, v ss = 0v, t a = C20 to 75 c measured at osc1 4.2 sed 1330 electrical characteristics parameter symbol condition rating unit min typ max supply voltage v dd 4.5 5.0 5.5 v register data retention voltage v oh 2.0 5.5 v input leakage current i li v i = v dd . 0.05 2.0 m a output leakage current i lo v i = v ss . 0.10 5.0 m a operating supply current i opr see note 4. 8 12 ma quiescent supply current i q v osc1 = v cs = v rd = v dd 0.05 20.0 m a oscillator frequency f osc 1.0 10.0 mhz external clock frequency f cl 10.0 mhz oscillator feedback resistance r f 0.5 1.0 5.0 m w ttl high-level input voltage v iht see note 1. 2.2 v dd + 0.3 v low-level input voltage v ilt see note 1. C0.3 0.8 v high-level output voltage v oht i oh = C5.0 ma. 2.4 v see note 1. low-level output voltage v olt i ol = 5.0 ma. see note 1. 0.4 v cmos high-level input voltage v ihc see note 2. 0.8v dd v low-level input voltage v ilc see note 2. 0.2v dd v high-level output voltage v ohc i oh = C1.6 ma. see note 2. v dd C 0.4 v low-level output voltage v olc i oh = 1.6 ma. see note 2. 0.4 v schmitt-trigger rising-edge threshold voltage v t+ see note 3. 0.5v dd 0.7v dd 0.8v dd v falling-edge threshold voltage v tC see note 3. 0.2v dd 0.3v dd 0.5v dd v notes: 1. d0 to d7, a0, cs, rd, wr, vd0 to vd7, va0 to va15, vr/w and vce are ttl-level inputs. 2. sel1, sel2 and osc1 are cmos-level inputs. yd, xd0 to xd3, xscl, yecl, lp, wf, yscl, ydis and clo are cmos-level outputs. 3. res is a schmitt-trigger input. the pulsewidth on res must be at least 200 m s. note that pulses of more than a few seconds will cause dc voltages to be applied to the lcd panel. 4. f osc = 10 mhz, no load (no display memory), internal character generator, 256 200 pixel display. the operating supply current can be reduced by approxi- mately 1 ma by setting both clo and the display off.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 53 notes: 1. d0 to d7, a0, cs, rd, wr, vd0 to vd7, va0 to va15, vrd, vwr and vce are ttl-level inputs. 2. sel1 and nt/pl are cmos-level inputs. yd, xd0 to xd3, xscl, xecl, lp, wf, yscl, ydis and clo are cmos-level outputs. 3. res is a schmitt-trigger input. the pulsewidth on res must be at least 200 m s. note that pulses of more than a few seconds will cause dc voltages to be applied to the lcd panel. 4. f osc = 10 mhz, no load (no display memory), internal character generator, 256 200 pixel display. the operating supply current can be reduced by approxi- mately 1 ma by setting both clo and the display off. 4.3 sed1335/1336 electrical characteristics parameter symbol condition rating unit min typ max supply voltage v dd 4.5 5.0 5.5 v register data retention voltage v oh 2.0 6.0 v input leakage current i li v i = v dd . see note 6. 0.05 2.0 m a output leakage current i lo v i = v ss . see note 6. 0.10 5.0 m a operating supply current i opr see note 4. 11 15 ma quiescent supply current i q sleep mode, 0.05 20.0 m a v osc1 = v cs = v rd = v dd oscillator frequency f osc 1.0 10.0 mhz external clock frequency f cl 1.0 10.0 mhz oscillator feedback resistance r f 0.5 1.0 3.0 m w ttl high-level input voltage v iht see note 1. 0.5v dd v dd v low-level input voltage v ilt see note 1. v ss 0.2v dd v high-level output voltage v oht i oh = C5.0 ma. 2.4 v see note 1. low-level output voltage v olt i ol = 5.0 ma. see note 1. v ss + 0.4 v cmos high-level input voltage v ihc see note 2. 0.8v dd v dd v low-level input voltage v ilc see note 2. v ss 0.2v dd v high-level output voltage v ohc i oh = C2.0 ma. see note 2. v dd C 0.4 v low-level output voltage v olc i oh = 1.6 ma. see note 2. v ss + 0.4 v open-drain low-level output voltage v oln i ol = 6.0 ma. see note 5. v ss + 0.4 v schmitt-trigger rising-edge threshold voltage v t+ see note 3. 0.5v dd 0.7v dd 0.8v dd v falling-edge threshold voltage v tC see note 3. 0.2v dd 0.3v dd 0.5v dd v v dd = 4.5 to 5.5v, v ss = 0v, t a = C20 to 75 c measured at crystal, 47.5% duty cycle. see note 7. 4.3 4.0 specifications
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 54 268-0.4 4.4 sed1330 timing diagrams 4.4.1 system bus read/write timing i (8080) figure 32. system bus read/write timing i (8080) t a = C20 to 75 c 4.0 specifications 4.4 C 4.4.1 t acc8 t oh8 t ah8 t aw8 t ds8 t dh8 t cc t cyc a0, cs wr, rd d0~d7 (write) d0~d7 (read) 4.4.1.1 sed1330f signal symbol parameter rating unit condition min max a0, cs t ah8 address hold time 10 ns t aw8 address setup time 30 ns wr, rd t cyc system cycle time (1) ns t cc strobe pulsewidth 220 ns cl = 100 t ds8 data setup time 120 ns pf d0 to d7 t dh8 data hold time 10 ns t acc8 rd access time 120 ns t oh8 output disable time 10 50 ns note: t cyc =2t c + t cc + t cea + 75 > t acv + 245: memory control/movement control commands: = 4t c + t cc + 30: all other commands:
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 55 4.4.2 C 4.4.2.1 4.0 specifications 4.4 sed1330 timing diagrams 4.4.2 system bus read/write timing ii (6800) t a = C20 to 75 c figure 33. system bus read/write timing ii (6800) t ds6 t ew t aw6 t ah6 t dh6 t oh6 t acc6 t cyc6 e r/w a0, cs d0~d7 (write) d0~d7 (read) 4.4.2.1 sed1330f signal symbol parameter rating unit condition min max a0, cs t ah6 address hold time 10 ns r/w t aw6 address setup time 30 ns t cyc6 system cycle time (1) ns cl=100pf+1ttl t ds6 data setup time 120 ns pf d0 to d7 t dh6 data hold time 10 ns t acc6 access time 120 ns t oh6 output disable time 10 50 ns et ew enable pulse width 220 ns note: (1) t cyc6 = 2t c + t ew + t cea + 75 > t acv + 245: memory control/movement control commands: = 4t c + t ew + 30: all other commands: 1. t cyc6 means a cycle of (cs.e) not e alone.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 56 268-0.4 4.0 specifications 4.4.3 C 4.4.3.1 4.4 sed1330 timing diagrams 4.4.3 display memory read timing t a = C20 to 75 c figure 34. display memory read timing t c t ce t ahc t rch t asc t rcs t ce3 t oh2 t cea t acy t cyr t w t w ext f o vce va0~va15 vr/w vd0~vd7 4.4.3.1 sed1330f signal symbol parameter rating unit condition min max ext ? 0t c clock cycle 100 ns vce t w vce high level pulse width tcC40 ns t ce vce low level pulse width 2tcC40 ns va0 t cyr read cycle time (1) ns to va15 t asc vce address setup time (fall) tcC45 ns cl = 100 pf t ahc vce address hold time (fall) 2tcC40 ns +1ttl vr/w t rcs vce read cycle setup time (fall) tcC45 ns t rch vce read cycle hold time (fall) tc/2C35 ns t acv address access time (2) ns vd0 t cea vce access time (3) ns to vd7 t oh2 output data hold time 0 ns t ce2 vce data off time 0 ns note: 1. t cyr = 3t c 2. t acv = 3t c C120 3. t cea = 2t c C120
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 57 4.4 sed1330 timing diagrams 4.4.4 display memory write timing t a = C20 to 75 c figure 35. display memory write timing 4.4.4.1 sed1330f signal symbol parameter rating unit condition min max ext ? 0t c clock cycle 100 ns vce t w vce high level pulse width tcC40 ns t ce vce low level pulse width 2tcC40 ns t cyw write cycle time 3tc ns t ahc vce address hold time (fall) 2tcC40 ns va0 t asc vce address setup time (fall) tcC55 ns cl = 100 pf to va15 t ca vce address hold time (rise) 5 ns +1ttl t as vr/w address setup time (fall) 0 ns t ah2 vr/w address hold time (rise) 15 ns vr/w t wsc vce write setup time (fall) tcC55 ns t whc vce write hold time (fall) tc2C40 ns vd0 t dsc vce data input setup time (fall) twscC10 ns to vd7 t dhc vce data input hold time (fall) 2tcC30 ns t dh2 vr/w data hold time (rise) 10* 50 ns * lines vd0 to vd7 are latched. 4.4.4 C 4.4.4.1 4.0 specifications t wsc t c t ce t cyw t ah2 t ca t oh2 t asc t whc t as t ohc t osc t ahc t w ext f o vce va0~va15 vwr vd0~vd7
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 58 268-0.4 4.4 sed1330 timing diagrams 4.4.5 lcd control timing 4.0 specifications 4.4.5 t wx t ds t l1 t ld t wy t dhy t l2 t wl t dh t wxe t cx t r t f 1 frame period 1 line period row1 row2 row64 t s2 t s1 t df row no lp yd wf yscl wf yscl lp xscl xd0~xd3 xecl xscl xd0~xd3 lp xecl wf(b) yd yscl figure 36. lcd control timing
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 59 4.4 sed1330 timing diagrams 4.4.5.1 sed1330f 4.4.5.1 4.0 specifications t a = C20 to 75 c signal symbol parameter rating unit condition min max ext ? 0t c clock cycle 100 ns t r vce high level pulse width 35 ns t f vce low level pulse width 35 ns xscl t cx shift clock cycle time 4tc ns t wx xscl clock pulse width t cx2C80 ns xd0 t dh x-data hold time t cx2 C100 ns v dd = 5.0v to xd3 t ds x-data setup time t cx2 C100 ns 10% lp t ls latch data setup time t cx2 C100 ns cl=150f t wl lp signal pulse width t cx4 C80 ns t l1 xecl setup time t cx3 C100 ns t l2 xecl data hold time t c C30 ns xecl t s1 enable setup time t c C30 ns t s1 enable delay time t c C30 ns t wxe xecl clock pulse width t cx3 C80 ns wf t df time allowance of wf delay 100 ns yscl t ld lp delay time against yscl t cx4 C100 ns t wy yscl clock pulse width t cx4 C80 ns yd t dhy y-data hold time t cx6 C100 ns
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 60 268-0.4 4.4 sed1330 timing diagrams 4.4.6 oscillator timing t a = C20 to 75 c 4.0 specifications 4.4 .6C 4.4.6.1 figure 37. oscillator timing t cl t rcl t fcl sleep period power on t wl t osp t wh t oss v dd clo ydis ext 0o 4.4.6.1 sed1330f signal symbol parameter rating unit condition min max clo t osp time to stable clo output after power on 3 ms res = h t oss time to stable clo output after sleep off 1 ms 20 pf t rcl external clock rise time 15 ns t fcl external clock fall time 15 ns ext?0 t wh external clock high-pulse width note 1 note 2 ns t wl external clock low-pulse width note 1 note 2 ns t cl external clock cycle 100 ns 1. (t c C t rcl C t fcl ) x 475/1000 < t wh , t wl 2. (t c C t rcl C t fcl ) x 525/1000 > t wh , t wl
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 61 4.4.7 4.0 specifications 4.4 sed1330 timing diagrams 4.4.7 measurement circuit figure 38. measurement circuit c = 100 pf 24 k 2.1 k in 916 compatable measurement terminal * c includes probe capacitance. v ss v dd
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 62 268-0.4 4.0 specifications 4.5 C 4.5.1.1 4.5 sed1335/sed1336 ac timing diagrams 4.5.1 8080 family interface timing t cyc t oh8 t ah8 t aw8 t cc t ds8 t dh8 t acc8 ao, cs wr, rd d0 to d7 (write) d0 to d7 (read) figure 39. 8080 family interface timing 4.5.1.1 sed1335f signal symbol parameter v dd = 4.5 to 5.5v v dd = 2.7 to 4.5v unit condition min max min max a0, cs t ah8 address hold time 10 10 ns t aw8 address setup time 0 0 ns wr, rd t cyc system cycle time see note see note ns t cc strobe pulsewidth 120 150 ns cl = 100 t ds8 data setup time 120 120 ns pf d0 to d7 t dh8 data hold time 5 5 ns t acc8 rd access time 50 80 ns t oh8 output disable time 10 50 10 55 ns note: for memory control and system control commands: t cyc8 = 2t c + t cc + t cea + 75 > t acv + 245 for all other commands: t cyc8 = 4t c + t cc + 30 t a = C20 to 75 c
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 63 4.5.1.2 4.0 specifications 4.5.1.2 SED1336F signal symbol parameter v dd = 4.5 to 5.5v v dd = 3.0 to 4.5v unit condition min max min max a0, cs t ah8 address hold time 10 10 ns t aw8 address setup time 0 0 ns wr, rd t cyc system cycle time see note see note ns t cc strobe pulsewidth 120 140 ns cl = 100 t ds8 data setup time 120 120 ns pf d0 to d7 t dh8 data hold time 5 5 ns t acc8 rd access time 50 70 ns t oh8 output disable time 10 50 10 50 ns note: for memory control and system control commands: t cyc8 = 2t c + t cc + t cea + 75 > t acv + 245 for all other commands: t cyc8 = 4t c + t cc + 30 t a = C20 to 75 c
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 64 268-0.4 4.5.2 6800 family interface timing note: t cyc6 indicates the interval during which cs is low and e is high. figure 40. 6800 family interface timing e r/w ao, cs d0 to d7 (write) d0 to d7 (read) t cyc t aw6 t ew t ah6 t dh6 t ds6 t oh6 t acc6 4.0 specifications 4.5.2
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 65 a0, cs, r/w 4.5.2.1 C 4.5.2.2 4.0 specifications 4.5.2.1 sed1335f signal symbol parameter v dd = 4.5 to 5.5v v dd = 2.7 to 4.5v unit condition min max min max t cyc6 system cycle time see note see note ns t aw6 address setup time 0 10 ns t ah6 address hold time 0 0 ns t ds6 data setup time 100 120 ns cl = d0 to d7 t dh6 data hold time 0 0 ns 100 pf t oh6 output disable time 10 50 10 75 ns t acc6 access time 85 130 ns et ew enable pulsewidth 120 150 ns note: for memory control and system control commands: t cyc6 = 2t c + t ew + t cea + 75 > t acv + 245 for all other commands: t cyc6 = 4t c + t ew + 30 t a = C20 to 75 c a0, cs, r/w 4.5.2.2 SED1336F signal symbol parameter v dd = 4.5 to 5.5v v dd = 3.0 to 4.5v unit condition min max min max t cyc6 system cycle time see note see note ns t aw6 address setup time 0 10 ns t ah6 address hold time 0 0 ns t ds6 data setup time 100 120 ns cl = d0 to d7 t dh6 data hold time 0 0 ns 100 pf t oh6 output disable time 10 50 10 70 ns t acc6 access time 85 120 ns et ew enable pulsewidth 120 140 ns note: for memory control and system control commands: t cyc6 = 2t c + t ew + t cea + 75 > t acv + 245 for all other commands: t cyc6 = 4t c + t ew + 30 t a = C20 to 75 c
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 66 268-0.4 4.5.3.1 sed1335f signal symbol parameter v dd = 4.5 to 5.5v v dd = 2.7 to 4.5v unit condition min max min max ext f 0t c clock period 100 125 ns t w vce high-level pulse- t c C 50 t c C 50 ns vce width t ce vce low-level pulse- 2t c C 30 2t c C 30 ns width t cyr read cycle time 3t c 3t c ns t asc address setup time to t c C 70 t c C 100 ns falling edge of vce t ahc address hold time from 2t c C 30 2t c C 40 ns falling edge of vce t rcs read cycle setup time to t c C 45 t c C 60 ns vrd falling edge of vce t rch read cycle hold time 0.5t c 0.5t c ns from rising edge of vce t acv address access time 3t c C 100 3t c C 115 ns vd0 to t cea vce access time 2t c C 80 2t c C 90 ns vd7 t oh2 output data hold time 0 0 ns t ce3 vce to data off time 0 0 ns 4.0 specifications 4.5.3 C 4.5.3.1 4.5.3 display memory read timing ext f 0 vce va0 to va15 vrd vd0 to vd7 (sed1335f) t c t w t ce t w t ahc t asc t cyr t rcs t cea t rch t ce3 t oh2 t acv figure 41. display memory read timing va0 to va15 cl = 100 pf t a = C20 to 75 c
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 67 4.5.3.2 4.0 specifications 4.5.3.2 SED1336F signal symbol parameter v dd = 4.5 to 5.5v v dd = 3.0 to 4.5v unit condition min max min max ext f 0t c clock period 100 125 ns t w vce high-level pulse- t c C 50 t c C 50 ns vce width t ce vce low-level pulse- 2t c C 30 2t c C 30 ns width t cyr read cycle time 3t c 3t c ns t asc address setup time to t c C 70 t c C 100 ns falling edge of vce t ahc address hold time from 2t c C 30 2t c C 40 ns falling edge of vce t rcs read cycle setup time to t c C 45 t c C 55 ns vrd falling edge of vce t rch read cycle hold time 0.5t c 0.5t c ns from rising egde of vce t acv address access time 3t c C 100 3t c C 110 ns vd0 to t cea vce access time 2t c C 80 2t c C 85 ns vd7 t oh2 output data hold time 0 0 ns t ce3 vce to data off time 0 0 ns va0 to va15 cl = 100 pf t a = C20 to 75 c
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 68 268-0.4 4.0 specifications 4.5.4 4.5.4 display memory write timing t wsc t c t ce t cyw t ah2 t ca t oh2 t asc t whc t as t ohc t osc t ahc t w ext f o vce va0~va15 vwr vd0~vd7 figure 42. display memory write timing
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 69 4.5.4.1 sed1335f signal symbol parameter v dd = 4.5 to 5.5v v dd = 2.7 to 4.5v unit condition min max min max ext f 0t c clock period 100 125 ns t w vce high-level pulse- t c C 50 t c C 50 ns vce width t ce vce low-level pulse- 2t c C 30 2t c C 30 ns width t cyw write cycle time 3t c 3t c ns t ahc address hold time from 2t c C 30 2t c C 40 ns falling edge of vce t asc address setup time to t c C 70 t c C 110 ns falling edge of vce va0 to t ca address hold time from 00ns va15 rising edge of vce t as address setup time to 00ns falling edge of vwr t ah2 address hold time from 10 10 ns rising edge of vwr t wsc write setup time to falling t c C 80 t c C 115 ns vwr edge of vce t whc write hold time from fall- 2t c C 20 2t c C 20 ns ing edge of vce t dsc data input setup time to t c C 85 t c C 125 ns falling edge of vce vd0 to t dhc data input hold time 2t c C 30 2t c C 30 ns vd7 from falling edge of vce t dh2 data hold time from 550550ns rising edge of vwr note: vd0 to vd7 are latching input/outputs. while the bus is high impedance, vd0 to vd7 retain the write data until the data read from the memory is placed on the bus. 4.5.4.1 4.0 specifications t a = C20 to 75 c cl = 100 pf
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 70 268-0.4 4.5.4.2 SED1336F signal symbol parameter v dd = 4.5 to 5.5v v dd = 3.0 to 4.5v unit condition min max min max ext f 0t c clock period 100 125 ns t w vce high-level pulse- t c C 50 t c C 50 ns vce width t ce vce low-level pulse- 2t c C 30 2t c C 30 ns width t cyw write cycle time 3t c 3t c ns t ahc address hold time from 2t c C 30 2t c C 40 ns falling edge of vce t asc address setup time to t c C 70 t c C 100 ns falling edge of vce va0 to t ca address hold time from 00ns va15 rising edge of vce t as address setup time to 00ns falling edge of vwr t ah2 address hold time from 10 10 ns rising edge of vwr t wsc write setup time to falling t c C 80 t c C 110 ns vwr edge of vce t whc write hold time from fall- 2t c C 20 2t c C 20 ns ing edge of vce t dsc data input setup time to t c C 85 t c C 120 ns falling edge of vce vd0 to t dhc data input hold time 2t c C 30 2t c C 30 ns vd7 from falling edge of vce t dh2 data hold time from 550550ns rising edge of vwr note: vd0 to vd7 are latching input/outputs. while the bus is high impedance, vd0 to vd7 retain the write data until the data read from the memory is placed on the bus. t a = C20 to 75 c cl = 100 pf 4.0 specifications 4.5.4.2
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 71 4.5.5 C 4.5.5.2 4.0 specifications 4.5.5 sleep in command timing vce wr (command input) ydis t wrl t wrd system set write sleep in write figure 43. sleep in command timing 4.5.5.1 sed1335f signal symbol parameter v dd = 4.5 to 5.5v v dd = 2.7 to 4.5v unit condition min max min max t wrd vce falling-edge delay see note 1 see note 1 ns wr time t wrl ydis falling-edge delay see note 2 see note 2 ns time notes: 1. t wrd = 18t c + t oss + 40 (t oss is the time delay from the sleep state until stable operation) 2. t wrl = 36t c [tc/r] [l/f] + 70 t a = C20 to 75 c cl = 100 pf 4.5.5.2 SED1336F signal symbol parameter v dd = 4.5 to 5.5v v dd = 3.0 to 4.5v unit condition min max min max t wrd vce falling-edge delay see note 1 see note 1 ns wr time t wrl ydis falling-edge delay see note 2 see note 2 ns time notes: 1. t wrd = 18t c + t oss + 40 (t oss is the time delay from the sleep state until stable operation) 2. t wrl = 36t c [tc/r] [l/f] + 70 t a = C20 to 75 c cl = 100 pf
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 72 268-0.4 4.0 specifications 4.5.6 C 4.5.6.2 4.5.6 external oscillator signal timing ext f 0 t wl t wh t cl t rcl t fcl figure 44. external oscillator signal timing 4.5.6.1 sed1335f signal symbol parameter v dd = 4.5 to 5.5v v dd = 2.7 to 4.5v unit condition min max min max t rcl external clock rise time 15 15 ns t fcl external clock fall time 15 15 ns t wh external clock see note 1 see note 2 see note 1 see note 2 ns high-level pulsewidth t wl external clock see note 1 see note 2 see note 1 see note 2 ns low-level pulsewidth t c external clock period 100 125 ns notes: 1. (t c C t rcl C t fcl ) 475 < t wh , t wl 1000 2. (t c C t rcl C t fcl ) 525 > t wh , t wl 1000 t a = C20 to 75 c ext f 0 4.5.6.2 SED1336F signal symbol parameter v dd = 4.5 to 5.5v v dd = 3.0 to 4.5v unit condition min max min max t rcl external clock rise time 15 15 ns t fcl external clock fall time 15 15 ns t wh external clock see note 1 see note 2 see note 1 see note 2 ns high-level pulsewidth t wl external clock see note 1 see note 2 see note 1 see note 2 ns low-level pulsewidth t c external clock period 100 125 ns notes: 1. (t c C t rcl C t fcl ) 475 < t wh , t wl 1000 2. (t c C t rcl C t fcl ) 525 > t wh , t wl 1000 t a = C20 to 75 c ext f 0
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 73 4.5.7 4.0 specifications 4.5.7 lcd output timing the following characteristics are for a 1/64 duty cycle. figure 45. lcd output timing t wx t ds t ld t wy t dhy t l1 t l2 t wl t dh t cx t r t f 1 frame period 1 line period row1 row2 row64 t s2 t s1 row lp yd wf yscl 6263641234 wf yscl lp xscl xd0~xd3 xecl xscl xd0~xd3 lp xecl wf(b) yd yscl t wxe t df 60 61 62 63 64
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 74 268-0.4 4.0 specifications 4.5.7 signal symbol parameter rating unit condition min max t r vce high level pulse width 35 ns t f vce low level pulse width 35 ns xscl t cx shift clock cycle time 4tc C70 ns t wx xscl clock pulse width 2t cC80 ns xd0 t dh x-data hold time 2t c C100 ns v dd = 5.0v to xd3 t ds x-data setup time 2t c C100 ns 10% lp t ls latch data setup time 2t c C100 ns cl=150f t wl lp signal pulse width 4t c C80 ns t l1 xecl setup time 3t c C100 ns t l2 xecl data hold time t c C30 ns xecl t s1 enable setup time t c C30 ns t s1 enable delay time t c C30 ns t wxe xecl clock pulse width 3t c C80 ns wf t df time allowance of wf delay 100 ns yscl t ld lp delay time against yscl 4t c C100 ns t wy yscl clock pulse width 4t c C80 ns yd t dhy y-data hold time 6t c C100 ns t c ? xscl 5 t c 4 notes: 1. the e-1330 reads display memory data from the address of the top left corner of the display screen, then scans horizontally until it reaches the address for the bottom right corner of the display screen. therefore, each line of x-driver data is sent starting from the left side of the display line. 2. the e-1330 uses nine cycles of ?0 as the basic cycle (t c ). the xscl waveform is shown in the following figure. t a = C20 to 75 c 4.5.7.1 sed1330f
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 75 4.5.7.2 C 4.5.7.3 4.0 specifications 4.5.7.2 sed1335f signal symbol parameter v dd = 4.5 to 5.5v v dd = 2.7 to 4.5v unit condition min max min max t r rise time 30 40 ns t f fall time 30 40 ns xscl t cx shift clock cycle time 4t c 4t c ns t wx xscl clock pulsewidth 2t c C 60 2t c C 60 ns xd0 to t dh x data hold time 2t c C 50 2t c C 50 ns xd3 t ds x data setup time 2t c C 100 2t c C 105 ns t ls latch data setup time 2t c C 50 2t c C 50 ns lp t wl lp pulsewidth 4t c C 80 4t c C 120 ns t ld lp delay time from xscl 0 0 ns wf t df permitted wf delay 50 50 ns yd t dhy y data hold time 2t c C 20 2t c C 20 ns t a = C20 to 75 c 4.5.7.3 SED1336F signal symbol parameter v dd = 4.5 to 5.5v v dd = 3.0 to 4.5v unit condition min max min max t r rise time 30 35 ns t f fall time 30 35 ns xscl t cx shift clock cycle time 4t c 4t c ns t wx xscl clock pulsewidth 2t c C 60 2t c C 60 ns xd0 to t dh x data hold time 2t c C 50 2t c C 50 ns xd3 t ds x data setup time 2t c C 100 2t c C 100 ns t ls latch data setup time 2t c C 50 2t c C 50 ns lp t wl lp pulsewidth 4t c C 80 4t c C 100 ns t ld lp delay time from xscl 0 0 ns wf t df permitted wf delay 50 50 ns yd t dhy y data hold time 2t c C 20 2t c C 20 ns note: the sed1335f/1336f reads display memory data from the address of the top left corner of the display screen, then scans horizontally until it reaches the address for the bottom right corner of the display screen. therefore, each line of x-driver data is sent starting from the left side of the display line. t a = C20 to 75 c cl = 100 pf cl = 100 pf
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 77 5.0 display control functions
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 79 5.0 C 5.1 5.0 display control functions 5.0 display control functions 5.1 character configuration the origin of each character bitmap is in the top left corner as shown in figure 38. adjacent bits in each byte are horizontally adjacent in the corresponding character image. although the size of the bitmap is fixed by the charac- ter generator, the actual displayed size of the charac- ter field can be varied in both dimensions. if the area outside the character bitmap contains only zeros, the displayed character size can easily be increased by increasing fx and fy, as the zeros ensure that the extra space between displayed char- acters is blank. the displayed character width can be set to any value up to 16 even if each horizontal row of the bitmap is two bytes wide. 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 d7 to d0 fx character height space character width space fy character starting point space data space data figure 46. example of character display ([fx] 8) and generator bitmap
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 80 268-0.4 5.0 display control functions 5.1 fy vertical non-display area character height space 16 dots horizontal non-display area fx 8 dots 8 dots space character width note: the sed1330f/1335f/1336f does not automatically insert spaces between characters. if the displayed character size is 8 pixels or less and the space between character origins is nine pixels or more, the bitmap must use two bytes per row, even though the character image requires only one. figure 47. character width greater than one byte wide ([fx] = 9)
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 81 5.2 C 5.2.2 5.0 display control functions 5.2 screen configuration 5.2.1 screen configuration the basic screen configuration of the sed1330f/ 1335f/1336f is as a single text screen or as overlap- ping text and graphics screens. the graphics screen uses eight times as much display memory as the text screen. a/p character memory area graphics memory area (xm,ym) (xm,0) (0,0) (0,ym) (xw,ym) 0800h 0000h display memory window 07ffh 47ffh c/r y x figure 48. virtual and physical screen relationship 5.2.2 display address scanning the sed1330f/1335f/1336f scans the display memory in the same way as a raster scan crt screen. each row is scanned from left to right until the address range equals c/r. rows are scanned from top to bottom. in graphics mode, at the start of each line, the address counter is set to the address at the start of the previous line plus the address pitch, ap. in text mode, the address counter is set to the same start address, and the same character data is read, for each row in the character bitmap. however, a new row of the character generator output is used each time. once all the rows in the character bitmap have been displayed, the address counter is set to the start address plus ap and the next line of text is displayed. figure 40 shows the relationship between the virtual screens and the physical screen.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 82 268-0.4 5.0 display control functions 5.2.2 w/s = 0, fx = 8, fy = 8 c/r 1 ? ? ? 8 9 ? ? ? 16 17 ? ? ? 24 ? ? ? sad sad + ap sad + 2ap sad + 1 sad + ap + 1 sad + 2 sad + ap + 2 sad + c/r sad + ap + c/r note: one byte of display memory corresponds to one character. figure 49. character position parameters sad sad + ap sad + 2ap sad +1 sad + ap + 1 sad + 2 sad + ap + 2 sad + c/r sad + ap + c/r 1 2 3 ? ? ? ? ? ? ? ? w/s = 0, fx = 8 c/r sad sad +1 sad + 2 sad + c/r sad + ap sad + ap + 1 sad + ap + c/r sad + 2ap line 1 line 2 line 3 ap ap note: one bit of display memory corresponds to one pixel. figure 50. character parameters vs. memory
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 83 5.2.2 5.0 display control functions figure 51. two-panel display address indexing note: in two-panel drive, the sed1330f/1335f/1336f reads line 1 and line b + 1 as one cycle. the upper and lower panels are thus read alternately, one line at a time. sad1 sad1 + 1 sad1 + 2 sad1 + c/r sad1 + ap sad1 + ap + 1 sad1 + ap + 2 sad1 + ap + c/r sad1 + 2ap sad3 + 1 sad3 + 2 sad3 + c/r sad3 + ap sad3 + ap + 1 sad3 + ap + 2 sad3 + ap + c/r sad3 + 2ap 1 ? ? ? 8 9 ? ? ? 16 17 ? ? ? 24 25 ? ? ? (l/f)/2 = b b + 1 ? ? ? b + 8 b + 9 ? ? ? b + 16 b + 17 ? ? ? b + 24 b + 25 ? ? ? ? (l/f) w/s = 1, fx = 8, fy = 8 c/r
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 84 268-0.4 5.0 display control functions 5.2.3 5.2.3 display scan timing figure 44 shows the basic timing of the sed1330f/ 1335f/1336f. one display memory read cycle takes nine periods of the system clock, f 0 (f osc ). this cycle repeats (c/r + 1) times per display line. when reading, the display memory pauses at the end of each line for (tc/r C c/r) display memory read cycles, though the lcd drive signals are still gener- ated. tc/r may be set to any value within the con- straints imposed by c/r, f osc , f fr , and the size of the lcd panel, and it may be used to fine tune the frame frequency. the microprocessor may also use this pause to access the display memory data. frame period display period divider frequency period tc/r c/r or or or ? ? ? ? or line 1 2 3 (l/f) lp t0 t1 t2 display read cycle interval graphics read interval character read interval graphics generator read interval f 0 vce va figure 52. display memory basic read cycle note: the divider adjustment interval (r) applies to both the upper and lower screens even if w/s = 1. in this case, lp is active only at the end of the lower screens display interval. figure 53. relationship between tc/r and c/r
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 85 5.3 C 5.3.3 5.0 display control functions 5.3 cursor control 5.3.1 cursor register function the sed1330f/1335f/1336f cursor address regis- ter functions as both the displayed cursor position address register and the display memory access address register. when accessing display memory outside the actual screen memory, the address regis- ter must be saved before accessing the memory and restored after memory access is complete. cursor display address register address pointer cursor register figure 54. cursor addressing note that the cursor may disappear from the display if the cursor address remains outside the displayed screen memory for more than a few hundred millisec- onds. 5.3.2 cursor movement on each memory access, the cursor address register changes by the amount previously specified with csrdir, automatically moving the cursor to the de- sired location. 5.3.3 cursor display layers although the sed1330f/1335f/1336f can display up to three layers, the cursor is displayed in only one of these layers: two-layer configuration: first layer (l1) three-layer configuration: third layer (l3) the cursor will not be displayed if it is moved outside the memory for its layer. layers may be swapped or the cursor layer moved within the display memory if it is necessary to display the cursor on a layer other than the present cursor layer. although the cursor is normally displayed for charac- ter data, the sed1330f/1335f/1336f may also dis- play a dummy cursor for graphical characters. this is only possible if the graphics screen is displayed, the text screen is turned off and the microprocessor generates the cursor control address. d = 1 fc1 = 0 fc0 = 1 fp1 = 0 fp0 = 0 fp3 = 0 fp2 = 1 cursor on block screen 1 (character screen) off block screen 2 (graphics screen) on figure 55. cursor display layers consider the example of displaying chinese charac- ters on a graphics screen. to write the display data, the cursor address is set to the second screen block, but the cursor is not displayed. to display the cursor, the cursor address is set to an address within the blank text screen block. since the automatic cursor increment is in address units, not character units, the controlling microproces- sor must set the cursor address register when moving the cursor over the graphical characters.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 86 268-0.4 5.0 display control functions 5.3.3 18 dots auto shift auto shift auto shift cursor address preset 8 dots 8 dots 8 dots 8 dots block cursor if no text screen is displayed, only a bar cursor can be displayed at the cursor address. if the first layer is a mixed text and graphics screen and the cursor shape is set to a block cursor, the sed1330f/1335f/1336f automatically decides which cursor shape to display. on the text screen it displays a block cursor, and on the graphics screen, a bar cursor. figure 56. cursor movement
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 87 5.4 5.0 display control functions 5.4 memory to display relationship the sed1330f/1335f/1336f supports virtual screens that are larger than the physical size of the lcd panel address range, c/r. a layer of the sed1330f/1335f/1336f can be considered as a window in the larger virtual screen held in display memory. this window can be divided into two blocks, with each block able to display a different portion of the virtual screen. this enables, for example, one block to dynamically scroll through a data area while the other acts as a status message display area. see figure 49 and 50. graphics page 3 display page 3 display page 2 display page 1 character page 1 character page 3 display page 1 display page 3 layer 1 layer 1 display page 2 character page 2 character page 2 display page 2 display page 4 layer 2 layer 2 sad1 sad3 sad2 sad4 sad1 sad3 sad2 sad4 ap c/r w/s = 0 w/s = 1 c/r cg ram display page 1 character page 1 character page 3 layer 1 display page 2 layer 2 sad1 graphics page 2 sad2 sad3 sad3 display page 3 sad2 sad1 c/r c/r c/r display page 1 layer 1 graphics page 2 graphics page 1 layer 2 layer 3 sad1 sad2 sad3 sad3 sad2 sad1 c/r c/r c/r figure 57. display layers of memory
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 88 268-0.4 5.0 display control functions 5.4 figure 58. display window and memory ap csra crx cry fx sad1 fy l/f display window crx virtual display memory limit 0000h ffffh fx = horizontal character field 16 dots fy = vertical character field 16 dots crx = horizontal cursor size 16 dots cry = vertical cursor size 16 dots c/r = characters per row 240 bytes l/f = lines per frame 256 bytes ap = address pitch 64 kbytes
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 89 5.4 5.0 display control functions sad1 sad2 sag 0000 sl1 0300 0400 0800 sl2 2000 2800 4440 4800 4a00 f000 character code back layer page 1 page 2 page 1 page 2 character generator ram not used character generator rom d7 to d0 d7 to d0 a (code) b c x y a b g c 70 88 88 88 f8 88 88 00 01110000 10001000 10001000 10001000 11111000 10001000 10001000 00000000 hex d7 d0 example of character a #4800 1 2 3 4 5 6 #4807 0080 1fff 0000 02ff (msb) d7 (lsb)(msb) d0 d7 magnified image (lsb) d0 b a display xy abc figure 59. memory map and magnified characters
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 90 268-0.4 5.0 display control functions 5.5 C 5.5.1 5.5 scrolling the controlling microprocessor can set the sed1330f/ 1335f/1336f scrolling modes by overwriting the scroll address registers sad1 to sad4, and by directly setting the scrolling mode and scrolling rate. 5.5.1 on-page scrolling the normal method of scrolling within a page is to move the whole display up one line and erase the bottom line. since the sed1330f/1335f/1336f does not automatically erase the bottom line, it must be erased with blanking data when changing the scroll address register. abc wxyz 789 wxyz 789 abc wxyz 789 wxyz 789 display memory ap c/r before scrolling after scrolling blank blank sad1 sad3 sad1 figure 60. on-page scrolling
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 91 5.5.2 5.0 display control functions 5.5.2 inter-page scrolling scrolling between pages and page switching can be performed only if the display memory capacity is greater than one screen. figure 61. inter-page scrolling abc wxyz 789 wxyz 789 abc wxyz 789 wxyz 789 display memory ap c/r before scrolling after scrolling sad1 sad1 abc
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 92 268-0.4 5.0 display control functions 5.5.3 5.5.3 horizontal scrolling the display can be scrolled horizontally in one- character units, regardless of the display memory capacity. abc 123 xyz bc 23 xyz1 before scrolling after scrolling sad1 sad1 display ap c/r display memory abc 123 xyz abc 123 xyz figure 62. horizontal wraparound scrolling refer to section 9.4 for application notes.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 93 5.5.4 C 5.5.5 5.0 display control functions 5.5.4 bidirectional scrolling bidirectional scrolling can be performed only if the display memory is larger than the physical screen both horizontally and vertically. although scrolling is normally done in single-character units, the hdot scr command can be used to scroll horizontally in pixel units. single-pixel scrolling both horizontally and vertically can be performed by using the scroll and hdot scr commands. see section 9.4 bc efg tuv 12 before scrolling after scrolling display memory fg tuv 1234 56 bc efg tuv a 34 567 89 12 abc e fg tuv 56 7 89 1234 ap c/r figure 63. bidirectional scrolling 5.5.5 scroll units table 21. scroll units mode vertical horizontal text characters pixels or characters graphics pixels pixels note that in a divided screen, each block cannot be indepen- dently scrolled horizontally in pixel units.
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 95 6.0 character generator
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 97 6.0 C 6.1.3 6.0 character generator 6.0 character generator 6.1 cg characteristics 6.1.1 internal character generator the internal character generator is recommended for minimum system configurations containing a sedsed1330f/1335f/1336f, display ram, lcd panel, single-chip microprocessor and power supply. since the internal character generator uses a cmos mask rom, it is also recommended for low-power applications. ?5 7-pixel font (see section 10) ? 160 jis standard characters ? can be mixed with character generator ram (maximum of 64 cg ram characters) ? can be automatically spaced out up to 8 16 pixels 6.1.2 external character generator rom the external cg rom can be used when fonts other than those in the internal rom are needed. data is stored in the external rom in the same format used in the internal rom. (see section 6.3.) ? up to 8 8-pixel characters (m2 = 0) or 8 16- pixel characters (m2 = 1) ? up to 256 characters (192 if used together with the internal rom) ? mapped into the display memory address space at f000h to f7ffh (m2 = 0) or f000h to ffffh (m2 = 1) ? characters can be up to 8 16-pixels; how- ever, excess bits must be set to zero. 6.1.3 character generator ram the user can freely use the character generator ram for storing graphics characters. the character gen- erator ram can be mapped by the microprocessor anywhere in display memory, allowing effective use of unused address space. ? up to 8 8-pixel characters (m2 = 0) or 8 16 characters (m2 = 1) ? up to 256 characters if mapped at f000h to ffffh (64 if used together with character generator rom) ? can be mapped anywhere in display memory address space if used with the character gen- erator rom ? mapped into the display memory address space at f000h to f7ffh if not used with the charac- ter generator rom (more than 64 characters are in the cg ram). set sag0 to f000h and m1 to zero when defining characters number 193 upwards.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 98 268-0.4 6.0 character generator 6.2 6.2 cg memory allocation since the sed1335f/1336f uses 8-bit character codes, it can handle no more than 256 characters at a time. however, if a wider range of characters is required, character generator memory can be bank- switched using the cgram adr command. note that there can be no more than 64 characters per bank. figure 64. internal and external character mapping built?n cg rom (160 characters, 5 7 pixels max.) cg ram cg ram 1 cg ram 2 cg ram n built-in cg rom (160 characters, 5 7 pixels max.) cg rom cg ram 1 cg ram 2 cg ram n sag cg ram adr cg rom cg ram (64 characters max, 8 16 pixels max) (64 characters max, 8 16 pixels max) m0 = 1 m0 = 1 basic cg space (256 characters, 8 16 pixels max.) 256 characters max. m1 = 0 256 characters max. m1 = 0
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 99 6.2 C 6.3 6.0 character generator table 22. character mapping item parameter remarks internal/external character generator selection m0 1 to 8 pixels m2 = 0 character field height 9 to 16 pixels m2 = 1 greater than 16 pixels graphics mode (8 bits 1 line) internal cg rom/ram select automatic determined by the external cg rom/ram select character code cg ram bit 6 correction m1 cg ram data storage address specified with cg ram adr can be moved anywhere in the command display memory address space 192 characters or less other than the area of figure 58 more than 192 characters set sag to f000h and overly sag and the cg rom table. external cg rom address 6.3 setting the character generator address the cg ram addresses in the vram address space are not mapped directly from the address in the sag register. the data to be displayed is at a cg ram address calculated from sag + character code + row select address. this mapping is shown in tables 23 and 24. table 23. character fonts, number of lines 8 (m2 = 0, m1 = 0) sag a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 character code 00000d7d6d5d4d3d2d1d0000 +row select address 0000000000000r2r1r0 cg ram address va15 va14 va13 va12 va11 va10 va9 va8 va7 va6 va5 va4 va3 va2 va1 va0 table 24. character fonts, 9 number of lines 16 (m2 = 1, m1 = 0) sag a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 character code 0000d7d6d5d4d3d2d1d00000 +row select address 000000000000r3r2r1r0 cg ram address va15 va14 va13 va12 va11 va10 va9 va8 va7 va6 va5 va4 va3 va2 va1 va0
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 100 268-0.4 6.0 character generator 6.3 C 6.3.2 row row 0 row 1 row 2 row 7 row 8 row 14 row 15 r3 0 0 0 0 1 1 1 r2 0 0 0 1 0 1 1 r1 0 0 1 1 0 1 1 r0 0 1 0 1 0 0 1 line 1 line 2 figure 65. row select address 6.3.1 m1 = 1 the sed1335f/1336f automatically converts all bits set in bit 6 of character code for cg ram 2 to zero. because of this, the cg ram data areas become contiguous in display memory. when writing data to cg ram: ? calculate the address as for m1 = 0. ? change bit 6 of the character code from 1 to 0. 6.3.2 cg ram addressing example ? define a pattern for the a in figure 38. ? the cg ram table start address is 4800h. ? the character code for the defined pattern is 80h (the first character code in the cg ram area). as the character code table in figure 58 shows, codes 80h to 9fh and e0h to ffh are allocated to the cg ram and can be used as desired. 80h is thus the first code for cg ram. as characters cannot be used if only using graphics mode, there is no need to set the cg ram data. table 25. character data example cgram adr 5ch reverse the cg ram ad- p1 00h dress calculation to cal- p2 40h culate sag csrdir 4ch set cursor shift direction to right csrw 46h cg ram start address is p1 00h 4800h p2 48h mwrite 42h p 70h write row 0 data p2 88h write row 1 data p3 88h write row 2 data p4 88h write row 3 data p5 f8h write row 4 data p6 88h write row 5 data p7 88h write row 6 data p8 00h write row 7 data p8 00h write row 8 data p16 00h write row 15 data note: lines = 1: lines in the character bitmap 8 lines = 2: lines in the character bitmap 3 9
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 101 6.4 6.0 character generator 6.4 character codes the following figure shows the character codes and the codes allocated to cg ram. all codes can be used by the cg ram if not using the internal rom. figure 66. on-chip character codes 0 lower 4 bits 0 1 2 3 4 5 6 7 8 9 a b c d e f 1 2 ! " # $ % & ' ( ) * + , . - / 3 0 1 2 3 4 5 6 7 8 9 : ; < + \> ? 4 @ a b c d e f g h i j k l m n o 5 p q r s t u v w x y z [ ? ] ^ _ 6 ' a b c d e f g h i j k l m n o 7 p q r s t u v w x y z { | } ? ? 8 upper 4 bits 8 a b c d e f
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 103 7.0 tv mode (SED1336F only)
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 105 7.0 C 7.1 7.0 tv mode (SED1336F only) 7.0 tv mode (SED1336F only) when used with an external video mixer circuit, the SED1336F can show the same display on a television as on the lcd panel. in addition, the changeover from lcd-only to tv-and-lcd display is instantaneous with the changing of the t/l register using the system set instruction. the tv and lcd display register parameters which are determined by hardware constraints are shown in table 26. table 26. register parameters clock cycles oscillator system tc/r (hex) c/r (hex) l/f (hex) per frequency, t/l horizontal line f o (mhz) ntsc 2a 1f c7 388 6.1050 1 pal 2a 1f c7 388 6.0625 1 lcd 3 2a 1f c7 3 388 6.0625 or 0 6.1050 7.1 sync generator circuit timing the ntsc and pal vertical sync signal waveforms are shown in figure 59 and 60, respectively. the vertical sync timing parameters and vsd output states are shown in table 27. interval after equalizing pulses 21h color field i vertical blanking interval 11h 3h 3h 3h 21h pre-blanking interval start of field i 1.5 ?0.1? 2 1 4 3 5 6 7 8 9 10 19 20 hh h 9-line vertical interval h t i 0.5h vertical serration pulse interval equalizing pulse interval horizontal sync interval display interval interval before equalizing pulses vertical sync pulse interval display interval reference subcarrier phase color field i post- blanking interval figure 67. ntsc vertical sync waveform
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 106 268-0.4 7.0 tv mode (sed1336 only) 7.1 42h 2.5h 2.5h field blanking (25h + a) (a = 11-line blanking interval) 17.5h 45h 2.5h 311 interval after equalizing pulses interval before equalizing pulses vertical sync pulse interval display interval reference subcarrier phase color field i post- blanking interval pre-blanking interval display period 312 313 314 315 316 317 318 319 320 335 figure 68. pal vertical sync waveform table 27. vertical sync timing characteristics pre- interval vertical interval reference post- equalizing vertical parameter blanking before sync pulse after subcarrier blanking display pulse serration interval equalizing interval equalizing phase color interval interval interval pulse pulse pulse field i interval ntsc system 21h 3h 3h 3h 11h 21h 200h 15ck 27ck timing pal system 42h 2.5h 2.5h 2.5h 17.5h 45h 200h 15ck 27ck timing vsd high high low or output impedance low low low low impedance high level impedance notes: 1. the ntsc system uses 262 lines per screen, and the pal system, 312. 2. h = horizontal line period ck = oscillator period
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 107 7.1 7.0 tv mode (sed1336 only) the horizontal sync signal waveforms are shown in figure 61, and the timing parameters and vsd output states, in table 28. note that snc and vsd are both high-impedance when in lcd mode. pre- blanking interval horizontal sync pulse post- blanking interval display interval display interval front porch back porch high impedance high impedance high impedance low or high impedance snc vsd figure 69. horizontal sync waveforms table 28. horizontal sync characteristics parameter pre-blanking front porch horizontal back porch post-blanking display interval sync pulse interval interval ntsc 29ck 10ck 29ck 28ck 36ck 256ck system timing pal 29ck 10ck 29ck 34ck 30ck 256ck system timing vsd high low low low high low or high output level impedance impedance impedance
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 109 8.0 description of circuit blocks
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 111 8.0 C 8.1.2.3 8.0 description of circuit blocks 8.0 description of circuit blocks 8.1 microprocessor interface 8.1.1 system bus interface sel1, sel2 (sed1330f and sed1335f only), a0, rd, wr and cs are used as control signals for the microprocessor data bus. a0 is normally connected to the lowest bit of the system address bus. sel1 and sel2 change the operation of the rd and wr pins to enable interfacing to either an 8080 or 6800 family bus, and should have either a pull-up or a pull-down resistor. with microprocessors using an 8080 family interface, the sed1330f/1335f/1336f is normally mapped into the i/o address space. 8.1.1.1 8080 series table 29. 8080 series interface signals a0 rd wr function 0 0 1 status flag read 101 display data and cursor address read 0 1 0 display data and parameter write 1 1 0 command write 8.1.1.2 6800 series table 30. 6800 series interface signals a0 rd wr function 0 1 1 status flag read 111 display data and cursor address read 0 0 1 display data and parameter write 1 0 1 command write 8.1.2 microprocessor synchronization the sed1330f/1335f/1336f interface operates at full bus speed, completing the execution of each command within the cycle time, t cyc . the controlling micro-processors performance is thus not hampered by polling or handshaking when accessing the sed1330f/1335f/1336f. display flicker may occur if there is more than one consecutive access that cannot be ignored within a frame. the microprocessor can minimize this either by performing these accesses intermittently, or by continuously checking the status flag (d6) and waiting for it to become high. 8.1.2.1 display status indication output (for sed1336 only) when cs, a0 and rd are low, d6 functions as the display status indication output. it is high during the tv-mode vertical retrace period or the lcd-mode horizontal retrace period, and low, during the period the controller is writing to the display. by monitoring d6 and writing to the data memory only during retrace periods, the display can be updated without causing screen flicker. 8.1.2.2 internal register access the system set and sleep in commands can be used to perform input/output to the sed1330f/1335f/ 1336f independently of the system clock frequency. these are the only commands that can be used while the sed1330f/1335f/1336f is in sleep mode. 8.1.2.3 display memory access the sed1330f/1335f/1336f supports a form of pipelined processing, in which the microprocessor
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 112 268-0.4 8.0 description of circuit blocks 8.1.2.3 synchronizes its processing to the sed1330f/1335f/ 1336fs timing. when writing, the microprocessor first issues the mwrite command. it then repeatedly writes display data to the SED1336F using the sys- tem bus timing. this ensures that the microprocessor is not slowed down even if the display memory access times are slower than the system bus access times. see figure 70. when reading, the microprocessor first issues the mread command, which causes the sed1330f/ 1335f/1336f to load the first read data into its output buffer. the microprocessor then reads data from the sed1330f/1335f/1336f using the system bus tim- ing. with each read, the sed1330f/1335f/1336f reads the next data item from the display memory ready for the next read access. see figure 71. figure 70. display memory write cycle figure 71. display memory read cycle note: a possible problem with the display memory read cycle is that the system bus access time, t acc , does not depend on the display memory access time, t acv . the microprocessor may only make repeated reads if the read loop time exceeds the sed1330f/ 1335f/1336f cycle time, t cyc . if it does not, nop instructions may be inserted in the program loop. t acc , t acv and t cyc limits are given in section 4.3. wr d0 to d7 wr/w vd0 to vd7 t cyc command write data write data write microprocessor display memory t cyc command write data read data read wr rd d0 to d7 wr/w vd0 to vd7 microprocessor display memory
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 113 8.1.3 C 8.1.3.1 8.0 description of circuit blocks 8.1.3 interface examples 8.1.3.1 z80? to sed1330f/1335f/1336f interface note: z80? is a registered trademark of zilog corporation. figure 72. z80? to sed1330f/1335f/1336f* interface reset z80 decoder iorq sed1335f/ 1336f sel 1 sel 2 a0 a1 to a15 d0 to d7 rd wr reset a0 cs d0 to d7 rd wr res note: *for SED1336F: sel 2 is open..
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 114 268-0.4 8.1.3.2 6802 to sed1330f/1335f/1336f interface figure 73. 6802 to sed1330f/1335f/1336f interface 8.0 description of circuit blocks 8.1.3.2 reset 6802 decoder a0 cs d0 to d7 rd wr res vma v dd sed1335f/ 1336f sel 1 sel 2 a0 a1 to a15 d0 to d7 e r/w reset note: *for SED1336F: sel 2 is open..
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 115 8.2 C 8.2.2 8.0 description of circuit blocks 8.2 display memory interface 8.2.1 static ram the figure below shows the interface between an 8k 8 static ram and the sed1330f/1335f/1336f. hc138 v dd sed1335f/ 1336f 6264 sram a0 to a12 ce1 ce2 oe r/w i/o1 to i/o8 va0 to va12 va13 to va15 vce vr/w i/o1 to i/o8 y a to c figure 74. static ram interface 8.2.2 supply current during display memory access the 24 address and data lines of the sed1330f/ 1335f/1336f cycle at one-third of the oscillator fre- quency, f osc . the charge and discharge current on these pins, i vop , is given by the equation below. when i vop exceeds i opr , it can be estimated by: i vop c v f where c is the capacitance of the display memory bus, v is the operating voltage, and f is the operating frequency. if v opr = 5.0v, f = 1.0 mhz, and the display memory bus capacitance is 1.0 pf per line: i vop 120 m a / mhz pf to reduce current flow during display memory ac- cesses, it is important to use low-power memory, and to minimize both the number of devices and the parasitic capacitance. note that bus buffers are required if the bus is heavily loaded.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 116 268-0.4 8.0 description of circuit blocks 8.3 C 8.4 8.3 oscillator circuit the sed1330f/1335f/1336f incorporates an oscil- lator circuit. a stable oscillator can be constructed simply by connecting an at-cut crystal and two ca- pacitors to osc1 and osc2, as shown in the figure below. if the oscillator frequency is increased, c d and c g should be decreased proportionally. note that the circuit board lines to osc1 and osc2 must be as short as possible to prevent wiring capaci- tance from changing the oscillator frequency or in- creasing the power consumption. figure 75. crystal oscillator 8.4 status flag the sed1330f/1335f/1336f has a single bit status flag. d6: x line standby t m t tc/r lp xscl t c/r figure 77. c/r to tc/r time difference sed1335f/1336f osc2 osc1 c d c g c d = 3 to 20 pf c g = 2 to 18 pf load impedance = 700 w (max) figure 76. status flag the d6 status flag is low (0) for the tc/r - c/r cycles at the end of each line where the sed1330f/1335f/ 1336f is not reading the display memory. the micro- processor may use this period to update display memory without affecting the display; however, it is recommended that the display be turned off when refreshing the whole display. d7 d0 xd6xxxxxxx: dont care
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 117 8.4 C 8.5 8.0 description of circuit blocks figure 78. flowchart for busy flag checking 8.5 reset the sed1330f requires a reset pulse at least 1 ms long after power-on in order to re-initialize its internal state. the sed1335f/1336f requires a minimum reset pulse of 200 m s. during reset, the lcd drive signals xd, lp and fr are halted. for maximum reliability, it is not recommended to apply a dc voltage to the lcd panel while the sed1330f/1335f/1336f is reset. turn off the lcd power supplies for at least one frame period after the start of the reset pulse. the sed1330f/1335f/1336f cannot receive com- mands while it is reset. commands to initialize the internal registers should be issued soon after a reset. a delay of 3 ms (maximum) is required following the rising edges of both res and v dd to allow for system stabilization. 200? reset pulse 0.7 v dd 0.3 v dd v dd res figure 79. reset timing read status flag d6 = 1? data input data input ? no no yes yes
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 119 9.0 application notes
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 121 9.0 C 9.1.1 9.0 application notes 9.0 application notes 9.1 initialization parameters the parameters for the initialization commands must be determined first. square brackets around a param- eter name indicate the number represented by the parameter, rather than the value written to the param- eter register. for example, [fx] = fx + 1. 9.1.1 system set instruction and param- eters ? fx the horizontal character field size is deter- mined from the horizontal display size in pixels [vd] and the number of characters per line [vc]. [vd] / [vc] [fx] vd: # of x-directional dots vc: # of x-directional characters ? c/r c/r can be determined from vc and fx. [c/r] = rnd([fx] / 8) [vc] where rnd(x) denotes x rounded up to the next highest integer. [c/r] is the number of bytes per line, not the number of characters. ? tc/r tc/r must satisfy the condition [tc/r] 3 [c/r] + 4. ? f osc and f fr once tc/r has been set, the frame frequency, f fr , and lines per frame [l/f] will also have been set. the lower limit on the oscillator frequency f osc is given by: f osc 3 ([tc/r] 9 + 1) [l/f] f fr ? if no standard crystal close to the calculated value of f osc exists, a higher frequency crystal can be used and the value of tc/r revised using the above equation. ? symptoms of an incorrect tc/r setting are listed below. if any of these appears, check the value of tc/r and modify it if necessary. ? vertical scanning halts and a high-con- trast horizontal line appears. ? all pixels are on or off. ? the lp output signal is absent or cor- rupted. ? the display is unstable. table 31. epson lcd unit example parameters (sed1335f only) resolution (x y) [fx] [fy] [c/r] tc/r f osc (mhz) see note 2 [fx] = 6 pixels: 8 or 16, depending [c/r] = 42 = 2ah bytes: 256 64 256 / 6 = 42 remainder 4 on the screen c/r = 29h. when using hdot 2dh 1.85 = 4 blank pixels scr, [c/r] = 43 bytes [fx] = 6 pixels: 8 or 16, depending [c/r] = 85 = 55h bytes: 512 64 512 / 6 = 85 remainder 2 on the screen c/r = 54h. when using hdot 58h 3.59 = 2 blank pixels scr, [c/r] = 86 bytes [fx] = 8 pixels: 8 or 16, depending [c/r] = 32 = 20h bytes: 256 128 256 / 8 = 32 remainder 0 on the screen c/r = 19h. when using hdot 22h 2.90 = no blank pixels scr, [c/r] = 33 bytes [fx] = 10 pixels: 8 or 16, depending [c/r] = 102 = 66h bytes: 512 128 512 / 10 = 51 remainder on the screen c/r = 65h. when using hdot 69h 8.55 2 = 2 blank pixels scr, [c/r] = 103 bytes notes: 1. the remainder pixels on the right-hand side of the display are automatically blanked by the sed1335f. there is no need to zero the display memory corresponding to these pixels. 2. assuming a frame frequency of 60 hz.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 122 268-0.4 9.0 application notes 9.1.2 9.1.2 initialization example the initialization example shown in figure 80 is for a sed1330f/1335f/1336f with an 8-bit microproces- sor interface bus display unit (512 128 pixels). start clear first memory layer supply on system set scroll hdot scr ovlay disp off clear second memory layer output display data csrw csr form disp on note: set the cursor address to the start of each screens layer memory, and use mwrite to fill the memory with space characters, 20h (text screen only) or 00h (graphics screen only). determining which memory to clear is explained in section 9.1.3. figure 80. initialization procedure
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 123 9.1.2 9.0 application notes table 32. initialization procedure no. command operation 1 power-up 2 supply wait for at least 3 ms after reset with v dd 3 4.5v 3 system set initialization. c = 40h p1 = 38h m0: internal cg rom m1: cg ram is 32 characters maximum m2: 8 lines per character w/s: two-panel drive iv: no top-line compensation p2 = 87h fx: horizontal character size = 8 pixels wf: two-frame ac drive p3 = 07h fy: vertical character size = 8 pixels p4 = 3fh c/r: 64 display addresses per line p5 = 49h tc/r: total address range per line = 90 f osc = 6.0 mhz, f fr = 70 hz p6 = 7fh l/f: 128 display lines p7 = 80h ap: virtual screen horizontal size is 128 addresses p8 = 00h 4 scroll c = 44h p1 = 00h first screen block start address p2 = 00h set to 0000h p3 = 40h display lines in first screen block = 64 p4 = 00h second screen block start address p5 = 10h set to 1000h p6 = 40h display lines in second screen block = 64 p7 = 00h third screen block start address p8 = 04h set to 0400h (continued)
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 124 268-0.4 5 hdot scr c = 5ah p1 = 00h set horizontal pixel shift to zero 6 ovlay c = 5bh p1 = 01h mx 1, mx 0: inverse video superposition dm 1: first screen block is text mode dm 2: third screen block is text mode 7 disp on/off c = 58h d: display off p1 = 56h fc1, fc0: flash cursor at 2 hz fp1, fp0: first screen block on fp3, fp2: second and fourth screen blocks on fp5, fp4: third screen block on 8 clear data in first layer fill first screen layer memory with 20h (space character) (continued) 9.0 application notes 9.1.2 table 32. initialization procedure (continued) no. command operation p9 = 00h fourth screen block start address p10 = 30h set to 3000h display memory 1st display memory page 2nd display memory page 3rd display memory page 4th display memory page (sad1) 0000h (sad3) 0400h 0800h (sad2) 1000h (sad4) 3000h 5000h
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 125 13 csr dir c = 4ch set cursor shift direction to right (continued) 9.1.2 9.0 application notes table 32. initialization procedure (continued) no. command operation 9 clear data in second layer fill second screen layer memory with 00h (blank data) display 1st layer 2nd layer blank code in every position character code in every position 10 csrw c = 46h p1 = 00h set cursor to start of first screen block p2 = 00h 11 csr form c = 5dh p1 = 04h crx: horizontal cursor size = 5 pixels p2 = 86h cry: vertical cursor size = 7 pixels cm: block cursor 12 disp on/off c = 59h display on display
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 126 268-0.4 18 csrw c = 46h p1 = 01h set cursor address to 1001h p2 = 10h 19 mwrite c = 42h (continued) 9.0 application notes 9.1.2 table 32. initialization procedure (continued) no. command operation 14 mwrite c = 42h p1 = 20h p2 = 45h e p3 = 50h p p4 = 53h s p5 = 4fh o p6 = 4eh n 15 csrw c = 46h p1 = 00h set cursor to start of second screen block p2 = 10h 16 csr dir c = 4fh set cursor shift direction to down 17 mwrite c = 42h p1 = ffh fill in a square to the left of the e p9 = ffh epson epson
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 127 30 csrw c = 46h p1 = 00h set cursor to line three of the first screen block p2 = 01h 31 csr dir c = 4ch set cursor shift direction to right 32 mwrite c = 42h p1 = 44h d p2 = 6fh o p3 = 74h t p4 = 20h p5 = 4dh m p6 = 61h a p7 = 74h t p8 = 72h r p9 = 69h i p10 = 78h x p11 = 20h p12 = 4ch l p13 = 43h c p14 = 44h d 9.1.2 9.0 application notes table 32. initialization procedure (continued) no. command operation p1 = ffh fill in the second screen block in the second column of line 1 p9 = ffh 20 csrw repeat operations 18 and 19 to fill in the background under epson 29 mwrite epson inverse display epson inverse display dot matrix lcd
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 128 268-0.4 9.0 application notes 9.1.3 9.1.3 display mode setting example 1: combining text and graphics ? conditions ? 320 200 pixels, single-panel drive (1/ 200 duty cycle) ? first layer: text display ? second layer: graphics display ?8 8-pixel character font ? cg ram not required ? display memory allocation ? first layer (text): 320/8 = 40 characters per line, 200/8 = 25 lines. required memory size = 40 25 = 1000 bytes. ? second layer (graphics): 320/8 = 40 char- acters per line, 200/1 = 200 lines. re- quired memory size = 40 200 = 8000 bytes. 03e8h 2nd graphics layer (8000 bytes) 2327h 0000h 1st character layer (1000 bytes) 03e7h figure 81. character over graphics layers ? register setup procedure system set tc/r calculation c = 40h p1 = 30h f osc = 6 mhz p2 = 87h f fr = 70 hz p3 = 07h p4 = 27h (1/6) 9 [tc/r] 200 = 1/70 p5 = 2fh [tc/r] = 48, so tc/r = 2fh p6 = c7h p7 = 28h p8 = 00h scroll c = 44h p1 = 00h p2 = 00h p3 = c8h p4 = e8h p5 = 03h p6 = c8h p7 = xh p8 = xh p9 = xh p10 = xh
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 129 9.1.3 C 9.1.4 9.0 application notes csr form c = 5dh p1 = 04h p2 = 86h hdot scr c = 5ah p1 = 00h ovlay c = 5bh p1 = 00h disp on/off c = 59h p1 = 16h x = dont care 9.1.4 display mode setting example 2: combining graphics and graphics ? conditions ? 320 200 pixels, single-panel drive (1/ 200 duty cycle) ? first layer: graphics display ? second layer: graphics display ? display memory allocation ? first layer (graphics): 320/8 = 40 charac- ters per line, 200/1 = 200 lines. required memory size = 40 200 = 8000 bytes. ? second layer (graphics): 320/8 = 40 char- acters per line, 200/1 = 200 lines. re- quired memory size = 8000 bytes. figure 82. two-layer graphics 1f40h 2nd graphics layer (8000 bytes) 3e7fh 0000h 1st graphics layer (8000 bytes) 1f3fh
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 130 268-0.4 9.0 application notes 9.1.4 C9.1.5 ? register setup procedure system set tc/r calculation c = 40h p1 = 30h f osc = 6 mhz p2 = 87h f fr = 70 hz p3 = 07h p4 = 27h (1/6) 9 [tc/r] 200 = 1/70 p5 = 2fh [tc/r] = 48, so tc/r = 2fh p6 = c7h p7 = 28h p8 = 00h scroll c = 44h p1 = 00h p2 = 00h p3 = c8h p4 = 40h p5 = 1fh p6 = c8h p7 = xh p8 = xh p9 = xh p10 = xh csr form c = 5dh p1 = 07h p2 = 87h hdot scr c = 5ah p1 = 00h ovlay c = 5bh p1 = 0ch disp on/off c = 59h p1 = 16h x = dont care 9.1.5 display mode setting example 3: combining three graphics layers ? conditions ? 320 200 pixels, single-panel drive (1/ 200 duty cycle) ? first layer: graphics display ? second layer: graphics display ? third layer: graphics display ? display memory allocation ? all layers (graphics): 320/8 = 40 charac- ters per line, 200/1 = 200 lines. required memory size = 40 200 = 8000 bytes.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 131 9.1.5 9.0 application notes 5dbfh 1f40h 2nd graphics layer (8000 bytes) 3e7fh 0000h 1st graphics layer (8000 bytes) 1f3fh 3e80h 3rd graphics layer (8000 bytes) figure 83. three-layer graphics ? register setup procedure system set tc/r calculation c = 40h p1 = 30h f osc = 6 mhz p2 = 87h f fr = 70 hz p3 = 07h p4 = 27h (1/6) 9 [tc/r] 200 = 1/70 p5 = 2fh [tc/r] = 48, so tc/r = 2fh p6 = c7h p7 = 28h p8 = 00h scroll c = 44h p1 = 00h p2 = 00h p3 = c8h p4 = 40h p5 = 1fh p6 = c8h p7 = 80h p8 = 3eh p9 = xh p10 = xh
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 132 268-0.4 9.0 application notes 9.1.5 C 9.2 csr form c = 5dh p1 = 07h p2 = 87h hdot scr c = 5ah p1 = 00h ovlay c = 5bh p1 = 1ch disp on/off c = 59h p1 = 16h x = dont care 9.2 system overview figure 84 shows the sed1330f/1335f/1336f in a typical system. the microprocessor issues instruc- tions to the 1330f/sed1335f/1336f, and the sed1330f/1335f/1336f drives the lcd panel and may have up to 64kbytes of display memory. since all of the lcd control circuits are integrated onto the sed1330f/1335f/1336f, few external com- ponents are required to construct a complete me- dium-resolution liquid crystal display. external character generator memory data bus address bus control bus character generator display address control driver control tv control* composite signal y driver main memory micro- processor display memory x driver x driver x driver lcd panel sed1335f/1336f display memory address bus display memory data bus lcd unit driver bus * SED1336F only tv figure 84. system block diagram
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 133 9.3 C 9.3.1 9.0 application notes 9.3 system interconnection 9.3.1 sed1330f/1335f figure 85. system interconnection diagram cs7 cs6 to cs0 sed1630f lat di inh fr yscl v 1 v 2 v 3 v 4 v 5 v reg p off a0 a1 to a7 iorq d0 to d7 rd wr res decoder a0 cs d0 to d7 rd wr res xd0 to xd3 sed1335f osc1 osc2 va13 to va15 vce vr/w va0 to va12 vd0 to vd7 xecl xscl lp wf ydis yd yscl a0 to a12 srm2064 (ram1) d0 to d7 we cs1 cs2 oe a0 to a12 srm2064 (ram2) d0 to d7 we cs1 cs2 oe a0 to a11 2732 (cgrom) d0 to d7 va12 y7 y6 to y0 a b c 10mhz crystal oe ce lcd unit sed1600f hc138 reset lcd lp xscl ecl do to d3 e0 fr e1 lp xscl ecl do to d3 fr ei lp xscl ecl do to d3 e0 fr ei lp xscl ecl do to d3 e0 fr ei power supply converter micro- processor sed1600f sed1600f sed1600f notes: 1. the recommended common drivers are the sed1743, sed1635. 2. the recommended segment drivers are the sed1742 and sed1606.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 134 268-0.4 9.0 application notes 9.3.2 9.3.2 SED1336F figure 86. system interconnection diagram the sed1330f/1335f/1336fs layered screens and flexible scrolling facilities support a range of display functions and reduces the load on the controlling microprocessor when displaying underlining, inverse display, text overlaid on graphics or simple animation. these facilities are supported by the sed1330f/ 1335f/1336fs ability to divide display memory into up to four different areas. ? character code table ? contains character codes for text display ? each character requires 8 bits ? table mapping can be changed by using the scroll start function cs7 cs6 to cs0 sed1630f di inh fr yscl v 1 v 2 v 3 v 4 v 5 v reg p off a0 a1 to a7 iorq d0 to d7 rd wr res decoder a0 cs d0 to d7 rd wr res xd0 to xd3 SED1336F osc1 osc2 va13 to va15 vce vr/w va0 to va12 vd0 to vd7 xscl lp wf ydis yd a0 to a12 srm2064 (ram1) d0 to d7 we cs1 cs2 oe a0 to a12 srm2064 (ram2) d0 to d7 we cs1 cs2 oe a0 to a11 2732 (cgrom) d0 to d7 va12 y7 y6 to y0 a b c 10mhz crystal oe ce lcd unit sed1600f hc138 reset lcd lp xscl ecl do to d3 e0 fr e1 lp xscl do to d3 fr ei lp xscl do to d3 e0 fr ei lp xscl do to d3 e0 fr ei power supply converter micro- processor sed1600f sed1600f sed1600f notes: 1. the recommended common drivers are the sed1743, sed1635. 2. the recommended segment drivers are the sed1742 and sed1606.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 135 9.3.2 C 9.4 9.0 application notes ? graphics data table ? contains graphics bitmaps ? word length is 8 bits ? table mapping can be changed ? cg ram table ? character generator memory can be modified by the external microprocessor ? character sizes up to 8 16 pixels (16 bytes per character) ? maximum of 64 characters ? table mapping can be changed ? cg rom table ? used when the internal character genera- tor is not adequate ? can be used in conjunction with the inter- nal character generator and external char- acter generator ram ? character sizes up to 8 16-pixels (16 bytes per character) ? maximum of 256 characters ? fixed mapping at f000h to ffffh 9.4 smooth horizontal scrolling figure 87 illustrates smooth display scrolling to the left. when scrolling left, the screen is effectively moving to the right, over the larger virtual screen. instead of changing the display start address sad and shifting the display by eight pixels, smooth scroll- ing is achieved by repeatedly changing the pixel-shift parameter of the hdot scr command. when the display has been scrolled seven pixels, the hdot scr pixel-shift parameter is reset to zero and sad incremented by one. repeating this operation at a suitable rate gives the appearance of smooth scroll- ing. to scroll the display to the right, the reverse proce- dure is followed. when the edge of the virtual screen is reached, the microprocessor must take appropriate steps so that the display is not corrupted. the scroll must be stopped or the display modified. note that the hdot scr command cannot be used to scroll individual layers.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 136 268-0.4 9.0 application notes 9.4 display ap ap p1 = 00h p1 = 01h p1 = 02h p1 = 03h p1 = 07h p1 = 00h hdot scr parameter sad sad + 1 sad + 2 sad = sad + 1 sad = sad not visible visible c/r virtual screen magnified note: the response time of lcd panels changes considerably at low temperatures. smooth scrolling under these conditions may make the display difficult to read. figure 87. hdot scr example
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 137 9.5 C 9.5.2.1 9.0 application notes 9.5 layered display attributes sed1330f/1335f/1336f incorporates a number of functions for enhanced displays using monochrome lcd panels. it allows the display of inverse charac- ters, half-intensity menu pads and flashing of selected screen areas. these functions are controlled by the ovlay and disp on/off commands. a number of means can be used to achieve these effects, depending on the display configuration. these are listed below. note, however, that not all of these can be used in the one layer at the same time. error attribute reverse half-tone local flashing ruled line mx1 0 1 0 1 0 0 0 0 1 mx0 1 1 0 1 0 1 0 1 1 combined layer display iv me bl rl line line yes, no epson error 1st layer display iv me bl rl line line yes, no epson 2ndt layer display figure 88. layer synthesis 9.5.1 inverse display the first layer is text, the second layer is graphics. 1. csrw, csdir, mwrite write 1s into the graphics screen at the area to be inverted. 2. ovlay: mx0 = 1, mx1 = 0 set the combination of the two layers to exclusive-or. 3. disp on/off: fp0 = fp1 = 1, fp1 = fp3 = 0. turn on layers 1 and 2. 9.5.2 half-tone display the fp parameter can be used to generate half- intensity display by flashing the display at 17 hz. note that this mode of operation may cause flicker prob- lems with certain lcd panels. 9.5.2.1 menu pad display turn flashing off for the first layer, on at 17 hz for the second layer, and combine the screens using the or function. 1. ovlay: p1 = 00h 2. disp on/off: p1 = 34h
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 138 268-0.4 9.0 application notes 9.5.2.1 C 9.5.3.2 figure 89. half-tone character and graphics 9.5.2.2 graph display to present two overlaid graphs on the screen, config- ure the display as for the menu bar display and put one graph on each screen layer. the difference in contrast between the half- and full-intensity displays will make it easy to distinguish between the two graphs and help create an attractive display. 1. ovlay: p1 = 00h 2. disp on/off: p1 = 34h 9.5.3 flashing areas 9.5.3.1 small area to flash selected characters, the mpu can alternately write the characters as character codes and blank characters at intervals of 0.5 to 1.0 seconds. 9.5.3.2 large area divide both layer 1 and layer 2 into two screen blocks each, layer 2 being divided into the area to be flashed and the remainder of the screen. flash the layer 2 screen block at 2 hz for the area to be flashed and combine the layers using the or function. figure 90. localized flashing ab sad1 1st layer sad2 2nd layer ab combined layer display + half-tone abc xyz abc xyz
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 139 9.6 C 9.6.2 9.0 application notes 9.6 16 16-dot graphic display 9.6.1 command usage this example shows how to display 16 16-pixel characters. the command sequence is as follows: csrw set the cursor address. csrdir set the cursor auto-increment di- rection. mwrite write to the display memory. 9.6.2 kanji character display the program for writing large characters operates as follows: 1. the microprocessor reads the character data from its rom. 2. the microprocessor sets the display address and writes to the vram. the flowchart is shown in figure 91. (1) (3) (5) (7) (9) (11) (13) (15) (17) (19) (21) (23) (25) (27) (29) (31) (2) (4) (6) (8) (10) (12) (14) (16) (18) (20) (22) (24) (26) (28) (30) (32) o 8 o 7 o 6 o 5 o 4 o 3 o 2 o 1 o 8 o 7 o 6 o 5 o 4 o 3 o 2 o 1 (6) (4) (2) (19) (17) (15) (13) (11) (9) (7) (5) (3) (1) 0h 1h 2h 3h 4h 5h 6h 7h 8h 9h ah bh ch dh eh fh data held in the microprocessor memory scan address a1 to a4 1st column 2nd column (n) shows the cg rom data readout order (kanji rom pattern) cg rom output a 0 = 0 a 0 = 1 (4) (2) (3) (1) data written into the sed1330 display memory 2nd column memory area 1st column memory area figure 91. graphics address indexing
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 140 268-0.4 9.0 application notes 9.6 C 9.6.2 (1) (3) (5) (7) (9) (11) (13) (15) (17) (19) (21) (23) (25) (27) (29) (31) (2) (4) (6) (8) (10) (12) (14) (16) (18) (20) (22) (24) (26) (28) (30) (32) direction of cursor movement 240 dots 320 dots figure 92. graphics bit map figure 93. 16 16-dot display flowchart start enable cursor downwards movement set column 1 cursor address write data set column 2 cursor address write data end using an external character generator rom, and 8 16-pixel font can be used, allowing a 16 16-pixel character to be displayed in two segments. the exter- nal cg rom eprom data format is described in section 5.1. this will allow the display of up to 128, 16 16-pixel characters. if cg ram is also used, 96 fixed characters and 32 bank-switchable characters can also be supported.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 141 10.0 internal character generator font
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 142 268-0.4 this page intentionally blank
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 143 10.0 10.0 internal character generator font 10.0 internal character generator font 012 345678 9abcdef 2 3 4 5 6 7 a b c d 1 character code bits 0 to 3 character code bits 4 to 7 figure 94. on-chip character set note: the shaded positions indicate characters that have the whole 6 8 bitmap blackened.
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 144 268-0.4 this page intentionally blank
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 145 11.0 glossary of terms
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s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 268-0.4 147 11.0 11.0 glossary of terms 11.0 glossary of terms a address ap address pitch parameter c character display mode cd cursor direction of movement parameter cg character generator cgram adr character generator memory address cm cursor display shape parameter c/r characters per row parameter crx horizontal cursor size parameter cry vertical cursor size parameter csr dir cursor direction of movement instruction csr form cursor size, position and type instruction csrr read cursor address register instruction csrw write cursor address register instruction dm display mode parameter fc flashing cursor parameter f fr frame frequency f osc oscillator frequency fp screen flashing parameter fx horizontal character size parameter fy vertical character size parameter g graphics display mode glc graphic line control unit hdot scr horizontal scrolling by pixels instruction iv screen origin compensation for inverse display l/f lines per frame instruction
s-mos systems, inc. ? 2460 north first street ? san jose, ca 95131 ? tel: (408) 922-0200 ? fax: (408) 922-0238 148 268-0.4 mread display memory read instruction mwrite display memory write instruction mx screen composition mode ov graphics layer select parameter ovlay screen layer mode instruction p parameter r row ram random access memory rom read only memory sad display scrolling start address parameter sl display scrolling length parameter tc/r length, including horizontal blanking, of one screen line vram display memory wf display drive waveform parameter w/s windows per screen parameter 11.0 glossary of terms 11.0 s-mos assumes no responsibility or liability for (1) any errors or inaccuracies contained in the information herein and (2) the use of the information or a portion thereof in any application, including any claim for (a) copyright or patent infringement or (b) direct, indirect, special or consequential damages. there are no warranties extended or granted by this document. the information herein is subject to change without notice from s-mos. september 1995 ? copyright 1995 s-mos systems, inc. printed in u.s.a. 268-0.4

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